Senior Engineer, Library Characterization (R&D Engineering)
SynopsysJob Title
Senior Engineer, Library Characterization (R&D Engineering)
Role Summary
Characterize and model standard cell libraries for advanced technology nodes, produce Liberty models used for timing and power analysis, and ensure library quality for tapeouts. Join the Library Characterization team responsible for characterization, validation, QA, release management, and methodology support.
Experience Level
Senior - posting specifies 2+ years of hands-on experience in standard cell library characterization.
Responsibilities
Primary responsibilities include characterizing cells, generating models, validating deliverables, debugging correlations, and improving flows and automation.
- Characterize and generate Liberty files (NLDM, NLPM, CCS timing and noise, ECSM, LVF, AOCV, POCV, spatial OCV, aging, EM).
- Handle characterization across many cell types: combinational, sequential, clock gating, synchronizers, retention, level shifters, power gating, always-on, filler, and decap cells.
- Debug and resolve correlation issues between characterization results, STA, and SPICE; identify root causes across tool flows.
- Execute QA checks, regression analysis, and release validation to ensure models meet accuracy and quality standards before release.
- Drive methodology and automation improvements to make characterization flows faster, more reliable, and maintainable.
- Coordinate project timelines, manage deliverables, and communicate status with design, verification, and product engineering teams.
- Validate models against design rules, perform sanity testing, and ensure documentation is complete for library releases.
Requirements
Must-have technical skills and experience; nice-to-have items noted.
- 2+ years of hands-on experience in standard cell library characterization and Liberty modeling.
- Strong understanding of Liberty formats and advanced modeling constructs (NLDM, CCS, ECSM, AOCV, POCV, aging).
- Experience characterizing multiple cell types (combinational, sequential, clock gating, level shifters, retention, power management).
- Solid grasp of SPICE simulation, timing analysis concepts, and correlation methodologies between characterization tools and STA flows.
- Proficiency in scripting (Python, Tcl, or Perl) for automation, data analysis, and flow development.
- Experience with industry-standard characterization tools and STA platforms is a plus.
Education Requirements
Bachelor's or Master's degree in Electronics, VLSI, Microelectronics, or a related technical field.
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
