Senior Engineer, IP Verification - Digital Design Verification

Job Title

Senior Engineer, IP Verification - Digital Design Verification

Role Summary

Responsible for planning and executing RTL verification for DRAM IP and related digital blocks. The role defines verification scope and strategy, develops and maintains SV/UVM testbenches, runs regressions, analyzes failures, and partners with design engineers to close verification gaps toward tapeout readiness.

The position works within a verification team that collaborates internationally to improve verification flows and supports multiple DRAM architectures and features.

Experience Level

Senior-level. Typical experience is 4+ years; degree-specific experience guidance is provided in the Education Requirements section.

Responsibilities

Primary responsibilities include developing verification environments, executing tests and regressions, debugging RTL and testbench issues, and reporting verification status and risks.

• Define verification scope, strategy, and plans for block/chip RTL verification.
• Develop, execute, and maintain SV/UVM testbenches and verification test vectors.
• Run directed and constrained-random tests and regressions; analyze results and triage failures.
• Drive closure of functional and code coverage metrics and identify verification gaps.
• Simulate, analyze, and debug block-level RTL; collaborate with design engineers to identify root cause and implement fixes.
• Maintain verification infrastructure and regression flows; work with international colleagues to evolve verification methodology for DRAM and emerging memory designs.
• Provide clear verification status, summaries, and risk communication to stakeholders.
• Proactively adopt approved AI tools to support verification workflows, scripting, and methodology improvements while retaining responsibility for technical decisions.

Requirements

Core technical and professional requirements. Degree and experience details are listed in Education Requirements below.

Must-have:

• Practical experience in RTL verification using SystemVerilog and UVM; experience building block-level verification environments.
• Experience with digital simulation and debug tools (examples: Xcelium, Simvision, Verdi/Verisium).
• Strong scripting skills (Perl, Python) for testbench and flow automation.
• Good understanding of digital circuits and RTL verification methodologies.
• Experience in DRAM or memory-related verification and ability to work effectively in a team.
• Strong communication and debugging skills.

Nice-to-have:

• Familiarity with additional verification tools and in-house flows for complex memory architectures.
• Experience improving verification methodology and automation at the team or project level.

Education Requirements

Bachelor's degree (Electronics Engineering or related engineering field) with 4–6 years of relevant experience, or a postgraduate degree in Electronics Engineering or related engineering field with 2–4 years of relevant experience.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.