Senior Engineer, GPU RTL Design - Pixel Pipeline

Job Title

Senior Engineer, GPU RTL Design - Pixel Pipeline

Role Summary

Implement and deliver RTL blocks and subsystems for next-generation mobile GPU IPs with emphasis on pixel processing and graphics pipeline stages. Work within the GPU Project and RTL teams at SARC/ACL and collaborate across architecture, verification, physical design, and software teams to produce production-ready designs.

Primary focus areas include microarchitecture definition, RTL implementation, integration, debug, and cross-domain tradeoffs for performance, power, and area.

Experience Level

Senior (mid-to-senior individual contributor). The posting indicates 2+ years of relevant RTL design experience; the role expects demonstrated hands-on RTL work and independent technical execution.

Responsibilities

Primary responsibilities include:

• Translate microarchitectural specifications into synthesizable, maintainable RTL for pixel pipeline and fixed-function graphics logic.
• Design, integrate, and debug complex RTL blocks across control, datapath, and memory subsystems.
• Collaborate with verification teams to enable thorough validation and resolve functional issues.
• Work with architecture, physical design, and system teams to address interface, timing, power, performance, and area tradeoffs.
• Drive design quality through linting, synthesis readiness, timing inputs, and design reviews.
• Contribute to design methodologies and best practices; explore emerging GPU and RTL techniques.

Requirements

Must-have skills and experience:

• 2+ years hands-on RTL design experience for complex SoC, CPU, or GPU architectures using Verilog/SystemVerilog (microarchitecture development, integration, and debug).
• Working knowledge of GPU or high-performance digital design concepts: control logic, datapath design, memory systems, and fixed-function acceleration relevant to graphics/pixel pipelines.
• Experience with front-end ASIC design flows including linting, synthesis, and timing analysis.
• Ability to interpret architectural specifications and make performance/power/area tradeoffs.
• Strong analytical problem-solving, technical communication, and collaboration skills in a fast-paced, global team.

Nice-to-have:

• Experience with pixel pipeline design, graphics performance optimization, or hardware ray tracing.
• Exposure to system-level integration, firmware enablement, or production IP release processes.

Education Requirements

Bachelor's degree in Computer Science, Computer Engineering, or a relevant technical field; a Master's degree is acceptable. The posting pairs these degrees with 2+ years of RTL design experience.

About the Company

Company: Samsung Austin Semiconductor

Headquarters: Austin, Texas, USA

Austin-based semiconductor manufacturing and R&D arm of Samsung Electronics, focusing on advanced semiconductor technologies, foundry services, and development of system LSI, memory, and GPU IP for mobile, automotive, and consumer markets.