Senior Engineer
Timing and signoff engineer responsible for timing constraints, static timing analysis (STA) and ECO flows at block and SoC level. Works with design, physical design, constraint teams and EDA vendors to achieve timing closure on advanced process nodes.
Senior. The posting requests 2β5 years of relevant experience in physical implementation and signoff methodologies.
Primary responsibilities focus on timing closure and ECO management across blocks and SoC integration.
Must-have technical skills and experience for immediate contribution.
Not specified.
Arm is an equal opportunity employer. Information about benefits and working models is provided by the employer.
Company: Arm
Headquarters: Cambridge, United Kingdom
ARM is a global leader in semiconductor and software design, driving innovation in computing technology. The company specializes in designing processors and systems that provide the essential building blocks for electronic devices. ARM's architecture is widely used in smartphones, servers, and IoT devices, and its collaborative culture fosters bold thinking, diversity, and high-impact benefits for its talented workforce.
