Senior Engineer - CMOS & Metallization Test Structure Design and Layout
Micron TechnologyJob Title
Senior Engineer - CMOS & Metallization Test Structure Design and Layout
Role Summary
Member of the R&D Scribe Build Group responsible for designing, laying out, and verifying electrical test structures (scribe/non-array) to support CMOS device development, compact modeling, reliability studies, and fab process monitoring. The role partners with Process Integration, Product & Design, Electrical Characterization, and related teams to enable silicon validation and process development.
Experience Level
Senior — minimum of 5 years of relevant engineering experience as indicated in the posting.
Responsibilities
The role focuses on test structure design, layout, verification, and cross-functional support for process and product integration.
- Design, layout, and verify electrical test structures and Test Element Groups (TEGs) for CMOS and metallization process monitoring.
- Interpret DUT definitions and deliver completed TEGs with high confidence in silicon functionality.
- Support process development through memory cell-based test-structure solutions and cross-functional collaboration.
- Implement targeted test solutions to investigate failure mechanisms and monitor silicon health.
- Perform parametric correlation, debug builds, and ensure build accuracy.
- Verify and validate test-structure documentation and associated parametric data.
Requirements
Key technical and professional requirements. Degree details are summarized under Education Requirements below.
- Minimum ~5 years of relevant engineering experience supporting semiconductor test-structure design and validation.
- Proficiency with EDA tools such as Cadence Virtuoso (layout and schematic) and Calibre for verification workflows.
- Strong layout, schematic capture, circuit build, and verification skills including DRC, LVS, and circuit simulation (HSPICE).
- Solid understanding of semiconductor device physics, parametric testing, and Design for Manufacturability (DFM).
- Practical knowledge of DRAM and NAND memory array architectures, fab processes, and typical failure modes.
- Effective problem-solving skills and ability to work collaboratively across cultures and disciplines.
- Nice-to-have: experience with Perl, Skill, and UNIX shell scripting; willingness to learn new tools and concepts.
Education Requirements
Required: Bachelor of Science in Electrical Engineering or Microelectronic Engineering (or equivalent) with ~5 years of relevant experience. Preferred: Master of Science in Electrical or Microelectronic Engineering (with ~3 years of experience stated as preferred). No certifications were specified.
About the Company
Company: Micron Technology
Headquarters: Boise, Idaho, USA
Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.
