Senior Emulation Design Verification Application Engineer

Job Title

Senior Emulation Design Verification Application Engineer

Role Summary

Customer-facing Application Engineer on the North America Verification Field Applications Engineering team supporting Cadence emulation (Palladium) and prototyping (Protium) platforms. The role delivers pre- and post-sales technical support, develops customer-specific emulation/prototyping requirements, and partners with R&D to produce solutions that ensure customer success.

Experience Level

Senior. The posting title includes "Senior." Years of experience were not specified.

Responsibilities

Provide front-line technical engagement with semiconductor and system customers to deploy and optimize emulation and FPGA prototyping solutions.

• Support pre-sales evaluations, benchmarks, technical demonstrations, and product presentations.
• Develop customer-specific acceleration, emulation, and prototyping requirements and methodologies.
• Collaborate with R&D to troubleshoot, debug, and deliver advanced acceleration/emulation/prototyping flows.
• Create technical product literature such as application notes and technical articles.
• Own customer success by establishing technical credibility and driving solutions to resolution.

Requirements

Must-have technical skills and practical experience; preferred items listed where applicable.

• Must-have: Hands-on FPGA prototyping knowledge including compilation, debug, and performance optimization on FPGA prototyping platforms.
• Must-have: Experience with hardware accelerators and emulators (emulation platform operation and maintenance).
• Must-have: Practical experience with Verilog/SystemVerilog (education or experience noted in source).
• Must-have: Understanding of design fundamentals: architecture, micro-architecture, HDLs, synthesis, and timing.
• Must-have: Lab or internship experience with bring-up, debug, and instrumentation.
• Preferred: Knowledge of Object-Oriented Programming and experience in one or more languages such as C++, Java, Python, or SystemVerilog.
• Preferred: Familiarity with Linux/Unix platforms and scripting languages such as Perl, Tcl, or Python.
• Preferred: Strong verbal and written communication, teamwork, self-motivation, and problem-solving skills.

Education Requirements

MS or BS degree in Computer Science, Computer Engineering, Electrical Engineering, or a related field is listed as the preferred education. The posting also references education or practical experience with Verilog/SystemVerilog and hands-on lab/internship experience; equivalent practical experience is implied by the mix of education and experience statements.

About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.