Senior DRAM Systems Architecture

Job Title

Senior DRAM Systems Architecture

Role Summary

Provide systems-level architecture leadership for next-generation memory solutions, focusing on DRAM, module, controller, platform and system interactions. The role combines analytical modeling, architecture development, reliability strategy, and cross-functional influence to define product roadmaps and technical tradeoffs.

Work with multidisciplinary engineering teams to evaluate performance, reliability, power, thermal, and cost tradeoffs and to produce architecture recommendations supported by quantitative analysis.

Experience Level

Senior — typically 8+ years of relevant experience in memory systems, semiconductor architecture, or computer architecture.

Responsibilities

Primary responsibilities include technical leadership, modeling, and cross-functional coordination to define and validate memory system architectures.

• Define architectures for DDR, LPDDR, HBM, CXL-attached memory, and emerging memory technologies.
• Develop analytical and simulation-based models to evaluate performance, reliability, power, thermal, and cost tradeoffs.
• Drive architecture requirements across DRAM, packaging, modules, controllers, platforms, and system software.
• Lead technical studies, roadmap development, and architecture recommendations supported by quantitative analysis.
• Influence cross-functional teams, mentor engineers, and guide technical decision-making.
• Contribute to patents, publications, and standards activities.

Requirements

Core qualifications and experience required for the role.

• 8+ years of experience in memory systems, semiconductor architecture, computer architecture, or related technical areas.
• Strong knowledge of DRAM architecture, memory systems, or high-performance computing system architecture.
• Proven ability to develop architecture recommendations using quantitative analysis and engineering tradeoffs.
• Experience using AI-powered tools and methodologies, including Large Language Models, agentic or generative AI, or AI-enabled simulation environments.

Nice-to-have:

• Experience with DDR, LPDDR, HBM, CXL, MRDIMM/RDIMM, or other emerging memory technologies.
• Experience with memory-system simulation or modeling tools such as Ramulator, DRAMsim3, gem5, or equivalent.
• Experience with queueing theory, stochastic/performance/reliability modeling, or mathematical optimization.
• Familiarity with RAS architecture (ECC, CRC, EDC, metadata, on-die ECC, rank/link protection) and system robustness approaches.
• Background in high-speed signaling, signal integrity, clock distribution, packaging, module design, PMIC, power or thermal systems; participation in JEDEC or similar standards organizations is a plus.

Education Requirements

Master's degree or equivalent experience in Electrical Engineering, Computer Engineering, Computer Science, Applied Mathematics, Physics, or a related technical field. Equivalent practical experience is acceptable where specified.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.