Senior Digital Verification Engineer

Job Title

Senior Digital Verification Engineer

Role Summary

Lead digital verification efforts for next-generation Power Management ICs (PMICs) in automotive and industrial products. Own verification planning through signoff, ensure functional correctness, reliability, and compliance, and collaborate with cross-functional and global teams.

Experience Level

Senior. This role requires substantial semiconductor industry experience; see Education Requirements for degree-specific experience guidance.

Responsibilities

Primary responsibilities include planning, executing, and delivering verification signoff and related collateral.

• Lead verification from planning through signoff, set milestones and signoff criteria.
• Define verification plans, methodologies, environments, regressions, and coverage goals.
• Review requirements, architecture, microarchitecture, interfaces, and implementation plans.
• Develop and maintain SystemVerilog/UVM-based verification environments, VIPs, scoreboards, monitors, checkers, and assertions.
• Create directed and constrained-random tests to validate functionality, performance, robustness, and corner cases.
• Measure and drive closure of functional, code, and assertion coverage; produce coverage reports and metrics.
• Apply SVA, formal verification, and regression analysis to find and resolve issues.
• Verify PMIC digital control, telemetry, diagnostics, safety, power sequencing, fault management, communication interfaces, and embedded control functions.
• Deliver verification collateral: test plans, environments, regressions, coverage reports, traceability, and signoff artifacts.
• Drive methodology improvements, automation, reuse, and mentor junior engineers.

Requirements

Must-have technical skills and attributes for successful performance in this role.

• Strong understanding of digital design fundamentals, FSMs, CDC, reset architecture, low-power design, and SoC integration.
• Expertise in Verilog/SystemVerilog and class-based verification methodologies (UVM/OVM).
• Proven experience with constrained-random, coverage-driven verification, and regression automation.
• Hands-on experience building testbenches, drivers, monitors, scoreboards, assertions, and reusable verification IP.
• Experience with SystemVerilog Assertions (SVA) and formal verification techniques.
• Proficiency with scripting for automation (Python, Perl, UNIX/Linux shell).
• Knowledge of standard protocols such as AMBA, I2C, SPI, UART, CAN, LIN, DDR, and PCIe.
• Strong analytical, debugging, problem-solving, communication, leadership, mentoring, and cross-functional collaboration skills.
• Nice-to-have: familiarity with FPGA/emulation/prototyping platforms (HAPS, Palladium, Zebu), UPF/CPF low-power flows, PMIC architectures, and experience using AI/LLM tools to boost productivity.

Education Requirements

Degree and experience guideline: BSEE with 8+ years, MSEE with 5+ years, or PhD with 3+ years of semiconductor industry experience. Degrees are in electrical engineering (or closely related technical fields) and require relevant industry verification experience.

About the Company

Company: NXP Semiconductors

Headquarters: Nijmegen, Netherlands

NXP Semiconductors N.V. is a global semiconductor company that provides High Performance Mixed Signal and Standard Product solutions. With over 45,000 employees and operations in more than 35 countries, NXP is a leader in secure connectivity solutions for embedded applications, catering to automotive, industrial IoT, mobile, and communication infrastructure markets. The company is committed to innovation and sustainability, advancing a smarter, safer, and more sustainable world through technology.