Senior Digital Design Engineer (RTL/SoC)
Powerlattice TechnologiesJob Title
Senior Digital Design Engineer (RTL/SoC)
Role Summary
Design and deliver digital blocks from microarchitecture through RTL for SoC products in a fast-paced startup environment. Responsible for producing timing-robust, production-quality RTL and driving integration with other chip subsystems.
Work closely with verification, physical design, and DFT teams to meet silicon schedule and quality targets. The role is hybrid with on-site presence required three days per week at the Chandler, AZ or Vancouver, WA offices; selective remote options may be considered for exceptional candidates in Silicon Valley.
Experience Level
Senior-level. (Title indicates senior; specific years of experience not specified.)
Responsibilities
Primary responsibilities include ownership of RTL delivery and cross-team integration:
- Own microarchitecture, implementation, and delivery of digital blocks from specification through RTL.
- Collaborate with verification, physical design, synthesis, and DFT teams to meet timing, area, and power targets.
- Ensure RTL is timing-robust and production-ready for SoC integration.
- Participate in design and code reviews, debug integration and silicon issues, and support bring-up activities.
- Work on-site three days per week at the specified HQs and coordinate across distributed teams.
Requirements
Must-have technical skills and experience:
- Proven experience designing RTL for digital blocks within SoC projects.
- Strong RTL coding and verification interface skills (e.g., Verilog/SystemVerilog).
- Solid understanding of microarchitecture, timing closure, and implementation trade-offs.
- Experience collaborating with verification, physical design, and DFT teams to deliver silicon.
- Able to work on-site three days per week at Chandler, AZ or Vancouver, WA offices.
Nice-to-have:
- Experience with synthesis, static timing analysis (STA), FPGA prototyping, or prior SoC tapeouts.
Education Requirements
Not specified.
About the Company
Company: Powerlattice Technologies
Headquarters: Vancouver, WA, United States
Early-stage semiconductor company that designs system-on-chip (SoC) components and digital IP. Works across RTL, verification, physical design and DFT, operating as a hybrid startup with offices in Vancouver, WA and Chandler, AZ.
