Senior DFT Power Methodology Engineer
NVIDIAJob Title
Senior DFT Power Methodology Engineer
Role Summary
As a senior engineer on NVIDIA's Design-for-X team, you will develop and deploy DFT methodologies focused on power, thermal and voltage-noise for high-performance datacenter GPUs. The role combines post-silicon analysis, methodology development, and cross-functional engineering to improve manufacturing test quality and reliability.
Work involves close collaboration with product, power-architecture and implementation teams and applying automation and ML techniques to hard-to-solve test and yield problems.
Experience Level
Senior — typically 6+ years (PhD), 10+ years (MSEE), or 12+ years (BSEE) of experience in DFT design and power-related engineering.
Responsibilities
Primary responsibilities include methodology innovation, post-silicon analysis, and cross-functional collaboration.
- Innovate DFT power, thermal and voltage-noise methodologies for datacenter GPUs.
- Design low-power and thermal test solutions for manufacturing under aggressive operating conditions.
- Perform post-silicon power and thermal data analysis to inform architecture and test strategies.
- Develop and deploy DFT methodologies that leverage applied ML and generative AI techniques.
- Collaborate with product development, power architecture, RTL, STA and place-and-route teams to implement solutions.
- Mentor and guide junior engineers on test design trade-offs, cost and quality considerations.
Requirements
Must-have technical skills and practical experience; nice-to-have items listed separately.
- Demonstrated hands-on experience in DFT design and power engineering (see Education Requirements for years guideline).
- Strong understanding of DFT fundamentals and VLSI topics: power, timing and voltage noise.
- Hands-on silicon debug and bring-up experience on ATE or SLT platforms.
- Proficiency with statistical tools for data analysis and drawing technical insights from large datasets.
- Familiarity with RTL and clock design, static timing analysis (STA), place-and-route and power signoff flows.
- Ability to think like a programmer and translate analyses into automated/AI-enabled solutions.
- Excellent written and verbal communication and strong collaboration skills.
- Nice-to-have: experience with power-analysis, thermal-analysis and IR-drop tools; prior application of AI/ML for EDA problems; experience managing DFT power methodology; post-silicon debug for thermal and IR-drop.
Education Requirements
Bachelor of Science in Electrical Engineering (BSEE) with approximately 12+ years of relevant experience, Master of Science in Electrical Engineering (MSEE) with approximately 10+ years, or PhD with approximately 6+ years in DFT design & power, VLSI, electrical engineering or a related technical field — or equivalent practical experience.
About the Company
Company: NVIDIA
Headquarters: Santa Clara, California, USA
NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.
