Senior DFT Engineer - Hardware

Job Title

Senior DFT Engineer - Hardware

Role Summary

Work on design-for-test (DFT) and design-for-X (DFX) features for high-speed IOs across pre-silicon and post-silicon phases. The role is on the IO/DFX engineering team and focuses on architecture, implementation, validation, and productization of test logic and methodologies for complex ASICs.

Primary goals are to develop scalable test features, verify test functionality using industry-standard methodologies and tools, and collaborate with IP, mixed-signal, post-silicon test, and production teams to deliver manufacturable, cost-efficient tests.

Experience Level

Senior — typically 5+ years of relevant experience in DFT, verification, or related ASIC test engineering.

Responsibilities

The main responsibilities include design, verification, and productization of DFX/DFT solutions for high-speed IOs across pre- and post-silicon stages.

• Define, design and validate DFX/DFT features for high-speed IOs from POR to post-silicon testing.
• Develop robust unit-level and SoC/full-chip test plans and sign off on test coverage using standard metrics.
• Perform pre-silicon simulation and debug of test functionality with industry-standard EDA tools.
• Automate flows, improve test execution, coverage measurement, and productize IO tests for manufacturing.
• Investigate and resolve complex mixed-signal test issues and create scalable cross-platform solutions.
• Collaborate closely with IP teams on IOBIST test logic and with mixed-signal circuit designers to integrate analog components.
• Coordinate with post-silicon test engineering and production engineering teams to optimize test quality and cost.

Requirements

Must-have technical skills, experience, and attributes.

• Strong analytical and problem-solving skills.
• Good understanding of digital logic design, architecture, and verification methodologies.
• Strong background in DFT engineering and post-silicon DFX productization.
• Proficient coding/scripting skills (industry-standard scripting languages).
• Experience with verification flows: constrained-random testing, UVM, coverage metrics, profiling tools; familiarity with SystemVerilog and UVM preferred.
• Experience with test automation, flow development, and coverage-driven verification.
• Excellent written and verbal communication skills and a willingness to learn.

Education Requirements

BTech/BE/BS or MTech/ME/MS in Electrical Engineering (EE), Electronics & Communication (ECE) or related technical fields, or equivalent practical experience.

About the Company

Company: NVIDIA

Headquarters: Santa Clara, California, USA

NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.