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Senior DFT Engineer

Capgemini
May 19, 2026
Full-time
On-site
Brasov, RO
DFT Jobs, Level - Senior

Job Title

Senior DFT Engineer

Role Summary

Implement and validate design-for-test (DFT) solutions for advanced process-node SoCs. The role sits within a DFT/physical design engineering team and focuses on DFT insertion, validation, silicon bring-up support, and cross-team debugging with verification and backend teams.

Primary mission: deliver and verify DFT infrastructure (scan, compression, MBIST/LBIST, JTAG/ATPG), improve test KPIs, and support failure analysis during silicon bring-up.

Experience Level

Senior β€” typically 6+ years of hands-on DFT experience as specified.

Responsibilities

Day-to-day responsibilities include implementing DFT flows, validating test patterns, and collaborating with physical design and verification teams.

  • Implement DFT according to established test methodologies for advanced process nodes.
  • Perform top- and block-level DFT insertion: scan compression, JTAG, ATPG, pattern validation and simulation, MBIST/LBIST.
  • Collaborate with physical design to resolve timing and integration issues related to DFT circuitry.
  • Verify and debug DFT circuitry and interfaces with other IP blocks; resolve timing simulation issues.
  • Analyze and improve DFT KPIs such as test coverage and pattern efficiency.
  • Support hierarchical retargeting and silicon bring-up, including diagnosis and physical failure analysis support.

Requirements

Key must-have skills and tools, followed by useful additional skills.

  • Must-have: 6+ years hands-on experience with DFT and test flows for large, complex SoCs.
  • Must-have: Strong knowledge of DFT techniques: JTAG, ATPG, scan compression, logic diagnosis, yield learning, IEEE 1500, MBIST/LBIST.
  • Must-have: Experience with commercial EDA DFT tools (examples: Synopsys DFT Compiler, Tessent/Tetramax, Modus/Encounter, VCS).
  • Must-have: Scripting capability in Perl, Tcl, and/or Python for flow automation and debug.
  • Nice-to-have: Experience with RTL simulation, synthesis, linting, CDC/RDC checks, static timing analysis (STA), and test quality metrics.
  • Nice-to-have: Hands-on experience with silicon bring-up, ATE support, and physical failure analysis.
  • Strong analytical and problem-solving skills.

Education Requirements

Not specified.


About the Company

Company: Capgemini

Headquarters: Paris, France

Global consulting, technology and engineering services firm offering digital and business transformation, cloud, AI, and engineering/R&D services across industries. Employs around 340,000 people in 50+ countries and provides end-to-end solutions from strategy and design to engineering.

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Date Posted: 2026-05-18