Senior Designer, Layout

Job Title

Senior Designer, Layout

Role Summary

The Senior Designer, Layout will produce section-level IC layouts and coordinate block-level layout activities for mixed-signal projects within the Joint Development Team (JDT) in the Data Center & Energy division. The role works closely with schematic designers, lead layout engineers and cross-functional teams to meet schedule, design and quality targets.

The position may include task allocation, scheduling, mentoring junior layout staff or interns, and participation in front-end product development across analog, digital, verification and layout disciplines. Travel up to 10% is required.

Experience Level

Senior — typically 5+ years of relevant IC layout experience.

Responsibilities

Primary responsibilities include section- and block-level layout delivery, coordination, and quality control.

• Create multi-hierarchical (section-level) IC layouts to meet design and schedule targets.
• Collaborate with schematic designers, block layout resources and lead layout engineers to integrate layouts into chip architectures.
• Allocate tasks, set schedules, and provide technical direction for block-level layout resources.
• Mentor and train new hires and interns on layout practices and team workflows.
• Support tape-out processes and coordinate interfacing with foundries and assembly as required.
• Contribute to development initiatives that improve layout methods and product readiness across mixed-signal projects.

Requirements

Must-have skills and experience, and notable advantages.

• Extensive section (multi-hierarchical) level IC layout experience.
• Strong understanding of semiconductor device physics, cross-section and construction, and IC reliability/failure mechanisms.
• Effective written and oral communication; ability to collaborate with global, cross-functional teams.
• Willingness to travel approximately 10% of the time.
• Nice-to-have: top/chip-level layout experience, leadership experience, and hands-on experience with ADC/DAC, array-based layouts, or high-voltage designs.
• Nice-to-have: experience across multiple process nodes (examples cited: 40 nm, 180 nm) and familiarity with tape-out and foundry interfacing workflows.
• Nice-to-have: familiarity with Cadence Virtuoso XL and Calibre verification tools.

Education Requirements

Bachelor of Science in Electronics or Electrical Engineering. The posting also specifies at least 5 years of relevant working experience.

About the Company

Company: Analog Devices

Headquarters: Norwood, Massachusetts, USA

Analog Devices is a leading global semiconductor company that bridges the physical and digital worlds, enabling breakthroughs at the Intelligent Edge. With a focus on innovation, ADI develops solutions that drive advancements in digitized factories, mobility, and digital healthcare. The company employs around 24,000 people globally and reported revenues exceeding $9 billion in FY24, creating technologies that transform lives across various sectors.