Senior Design Verification Infrastructure Engineer - VIPs and Testbench
Develop and maintain the verification platform that provides reusable VIPs, AIPs, testbench components, and libraries used across SiFive for design verification and validation. Collaborate with design verification teams to integrate SystemVerilog/UVM components and Chisel-based platform libraries.
Senior — typically requires 3+ years of industry experience.
Primary responsibilities include:
Must-have skills and experience:
Nice-to-have:
Bachelor’s, Master’s, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field is typically expected (BS/MS/PhD).
Company: SiFive
Headquarters: San Mateo, California, United States
SiFive is a pioneering company in the RISC-V ecosystem, focused on transforming the future of computing by delivering high-performance, data-intensive RISC-V solutions. Their compute platforms empower leading technology firms to innovate across various markets, including AI, machine learning, and automotive sectors. SiFive is recognized for its commitment to ongoing innovation and fostering collaboration among talented teams, impacting lives by enabling advanced chip design.
