Senior Design Verification Engineer (Mixed-Signal / SoC)

Job Title

Senior Design Verification Engineer (Mixed-Signal / SoC)

Role Summary

Lead pre-silicon design verification for complex SoC or subsystem designs within a multifunctional verification team. Drive verification strategy, architecture, methodology and execution from planning to closure across IP, block, subsystem and system levels.

The role collaborates with design, firmware, emulation/FPGA and system teams to ensure functional correctness and performance of mixed-signal and digital products.

Experience Level

Senior — typically requires 5+ years of digital pre-silicon verification experience (experience in SoC/subsystem verification preferred).

Responsibilities

Primary responsibilities include planning and executing verification efforts and implementing scalable verification flows and environments.

• Lead pre-silicon verification for SoC or subsystem designs from planning through closure.
• Define verification architecture, methodology and DV flows; implement UVM-based testbenches and scalable test environments.
• Develop and execute test plans; drive functional and code coverage closure.
• Verify microprocessor-based systems, AI/ML accelerators and high-speed peripherals; perform system-level use case and performance validation.
• Coordinate across emulation, FPGA, firmware and software teams for end-to-end verification.
• Apply formal verification techniques and lead NoC/interconnect verification and coverage optimization.
• Use emulation, portable stimulus and virtual platforms where appropriate to accelerate verification.
• Drive verification quality, schedules and continuous improvement of methodologies.

Requirements

Must-have technical skills and practical verification experience.

• Strong hands-on expertise in Verilog/SystemVerilog and UVM-based testbench development and debugging.
• Experience with functional and code-coverage driven verification and achieving coverage closure at block and subsystem levels.
• Expertise in NoC, bus and interconnect verification, including coverage analysis and optimization.
• Experience in power-aware verification using UPF and power analysis techniques.
• Exposure to formal verification and gate-level simulation with timing annotation.
• Knowledge of test planning, constrained-random verification, assertions and transaction-level modeling.
• Proficiency in C/C++, SystemC and scripting (Python, TCL, Shell).
• Excellent communication and collaboration skills; ability to work with global cross-functional teams.
• Strong problem-solving skills and ability to learn new technologies quickly.
• Nice-to-have: Familiarity with processor-based systems (ARM, RISC-V, Tensilica), AI/ML or GPU-based architectures.

Education Requirements

B.Tech or M.Tech degree (engineering) is specified; the role also expects ~5+ years of pre-silicon digital verification experience. No certifications were specified.

About the Company

Company: Analog Devices

Headquarters: Norwood, Massachusetts, USA

Analog Devices is a leading global semiconductor company that bridges the physical and digital worlds, enabling breakthroughs at the Intelligent Edge. With a focus on innovation, ADI develops solutions that drive advancements in digitized factories, mobility, and digital healthcare. The company employs around 24,000 people globally and reported revenues exceeding $9 billion in FY24, creating technologies that transform lives across various sectors.