Senior Design Verification Engineer

Role Summary

This role is for a Senior Design Verification Engineer at Akeana, a startup in the semiconductor space, focusing on processor design.

Experience Level

Senior level with significant experience in design verification.

Responsibilities

The responsibilities include:

• Verifying complex CPU or Cache Coherent subsystems.
• Collaborating closely with Architecture and RTL design teams.
• Taking ownership of one or more areas of verification.

Requirements

Must-have requirements include:

• Strong background in unit/cluster-level verification.
• Experience with processor architecture (RiscV, ARM, Mips, Solaris, x86).
• Proficiency in System Verilog or C++, with UVM experience being desirable.
• Good knowledge of assembly or C programming is a plus.

Education Requirements

Information not specified.

About the Company

Company: Akeana

Headquarters: Santa Clara, CA, USA

Akeana is a start-up specializing in processor design, with a team experienced in developing state-of-the-art products. Their expertise spans multiple architectures, including Risc-V, ARM, and x86, with backgrounds from prominent companies in the semiconductor industry. Funded by top-tier venture capitalists and industry leaders, Akeana focuses on innovative RTL design and micro-architecture development.