Senior CPU Design Engineer — FE Integration and FE Flow

Job Title

Senior CPU Design Engineer — FE Integration and FE Flow

Role Summary

Lead front-end (FE) integration and quality assurance for complex CPU subIP integration across multiple development sites. Drive static-methodology sign-off and integration flow improvements, mentor engineers, and coordinate cross-functional and vendor interactions to ensure design quality.

Work within the Silicon and Platform Engineering Group to define and enforce integration guidelines, perform advanced static analysis, and improve end-to-end FE workflows.

Experience Level

Senior; minimum of 7 years of relevant industry experience.

Responsibilities

Primary responsibilities include leading integration projects, ensuring static sign-off, and improving integration workflows.

• Lead end-to-end subIP front-end integration for complex CPU designs across multiple sites.
• Provide expert static-methodology sign-off (CDC, RDC, Lint, VC-LP, and low-power static sign-off).
• Drive design quality assurance, establish metrics and standards, and perform advanced static analysis.
• Develop, optimize, and maintain FE integration flows and methodologies for improved efficiency.
• Troubleshoot and debug complex integration and design issues; resolve cross-site technical challenges.
• Mentor and train junior engineers on integration best practices.
• Coordinate cross-functional teams and vendor partners to resolve tool issues and drive enhancements.
• Lead continuous improvement initiatives for integration processes and quality metrics.

Requirements

Must-have technical skills and experience; nice-to-have items listed separately.

• Must-have: Minimum 7 years of industry experience in front-end integration for CPU or similarly complex SoC designs.
• Proven experience with end-to-end subIP integration across multiple development sites.
• Expert knowledge of static sign-off methodologies: CDC, RDC, Lint, VC-LP, and low-power static sign-off.
• Experience driving QA processes, defining design-quality metrics, and optimizing integration flows.
• Strong debugging skills for integration and design-level challenges; ability to lead cross-site technical discussions.
• Experience mentoring engineers and providing technical guidance.
• Proven ability to work with vendor tools and drive vendor collaboration for tool fixes and enhancements.
• Nice-to-have: Specific tool experience or prior work on CPU microarchitecture projects (not specified in posting).

Education Requirements

Not specified.

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.