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Senior CPU Core Physical Design Engineer

Intel Corporation
May 06, 2026
Full-time
Remote friendly (Folsom, California, United States)
Worldwide
$141,910 - $269,100 USD yearly
Physical Design Jobs, Level - Senior

Job Title

Senior CPU Core Physical Design Engineer

Role Summary

Work on physical implementation of custom CPU cores from RTL through GDS to produce manufacturing-ready designs. The role sits on a US CPU design team and focuses on timing, power, reliability, and signoff for next-generation CPUs used in AI and cloud computing.

The engineer will collaborate with logic, circuit, architecture, design automation teams and EDA vendors to improve tool capability and physical design methodologies.

Experience Level

Senior β€” requires multiple years of relevant experience. Minimum experience guidance provided in Education Requirements.

Responsibilities

Primary responsibilities include executing the CPU physical design flow, verification/signoff, and cross-team collaboration to meet product goals.

  • Implement physical design from RTL to GDS: synthesis, place-and-route, floorplanning, clock tree synthesis, and layout closure.
  • Perform signoff and verification: static timing analysis, equivalence checks, reliability verification, power integrity (static and dynamic), layout vs. schematic and electrical rule checks.
  • Analyze design results and recommend microarchitecture or implementation changes to improve timing, power, area, and reliability.
  • Design and validate power/clock distribution and multi-power-domain strategies; support low-power design techniques.
  • Work with EDA vendors to enhance tools and automate flows for high-frequency, low-power CPU designs.
  • Contribute to development and improvement of physical design methodologies, flows, and automation.

Requirements

Must-have technical skills and experience required to perform the role. Preferred items are noted where applicable.

  • 6+ years relevant experience (see Education Requirements for degree-based guidance) in VLSI circuit design and synthesis, or equivalent industry experience.
  • 4+ years experience in static timing analysis and timing closure.
  • 4+ years experience in low-power design techniques and power analysis.
  • Experience with verification and signoff flows: power integrity, equivalence checking, layout verification, and design rule checks.
  • Experience collaborating with EDA vendors and customizing/enhancing tool flows for CPU design.
  • Strong problem solving and ability to operate with some ambiguity.
  • Nice to have: experience with x86 CPU architecture and scripting/programming (Tcl, Perl, Python).

Education Requirements

Required: Bachelor's degree in Computer Engineering, Computer Science, Electrical/Electronic Engineering, or another STEM field plus 6+ years of relevant experience; OR a Master's degree in those fields plus 4+ years of relevant experience. No specific certifications listed.


About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.

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Date Posted: 2026-05-06