Skip to main content
T

Senior ASIC Verification Engineer

Tensordyne
August 27, 2026
Full-time
On-site
Sunnyvale, California, United States
Verification Jobs, Level - Senior

Job Title

Senior ASIC Verification Engineer

Role Summary

Lead all phases of ASIC verification for Tensordyne’s next-generation processors for generative AI inference acceleration. Ensure pre-silicon correctness of a multi-million-gate ASIC integrating computational accelerators with 3rd-party SoC IP.

Work closely with architecture and design teams from specification through tapeout and support post-silicon validation in the lab. This is an early-stage, high-impact role at a well-funded startup.

Experience Level

Senior — typically 4–8 years of ASIC verification experience, including multiple chips taken through full verification and post-silicon validation.

Responsibilities

Key responsibilities include:

  • Lead verification planning from architecture through tapeout and drive verification signoff criteria.
  • Develop block-level, subsystem, and full-chip verification environments and tests using SystemVerilog, UVM, and OOP methodologies.
  • Define test and coverage strategies; implement constrained-random stimulus and coverage-driven verification.
  • Verify SoC/subsystem components including embedded CPUs (ARM/RISC-V), interconnects, and high-speed interfaces.
  • Triage and debug functional and performance issues; manage bug tracking, coverage convergence, and regression failures.
  • Develop scripts and methodologies for the front-end ASIC flow and scale reusable verification frameworks.
  • Mentor and provide technical guidance to verification engineers toward verification closure.
  • Perform diagnostic and post-silicon validation tests in the lab.

Requirements

Must-have skills and relevant experience:

  • Expertise in SystemVerilog and UVM, including constrained randomization and functional coverage.
  • Proficiency in C/C++ or SystemC.
  • Strong object-oriented programming knowledge and coverage-driven verification approach.
  • Verification experience with high-speed interfaces (PCIe, Ethernet, DDR/HBM, SerDes).
  • Experience in SoC/subsystem verification (embedded CPUs, interconnects).
  • Scripting experience desirable: Python, Perl, Tcl, shell.
  • Interest in AI architectures (convolution, transformer workloads).
  • Self-starter comfortable in a fast-paced startup environment.

Education Requirements

B.S. degree required; M.S. preferred in Electrical Engineering, Computer Engineering, or a similar technical field.


About the Company

Company: Tensordyne

Tensordyne is a startup developing high-performance, low-power AI inference processors and multi-chip systems for generative AI acceleration in data centers. The company focuses on ASIC design, verification, and integration of computational accelerators with third-party SoC IP.

Tensordyne logo

Date Posted: 2026-08-26