Senior ASIC Implementation Engineer, Low Power AI

Job Title

Senior ASIC Implementation Engineer, Low Power AI

Role Summary

Design and implement ultra-low power ASIC solutions for audio and context-aware AI subsystems. Work within an ASIC implementation team focused on synthesis, timing, power intent and low-power optimization for a chip-within-a-chip SoC block.

Short-term focus: power intent (CLP), power tools (PTPX / PowerPro), and power analysis/optimization.

Experience Level

Senior (title-level). Hiring expects candidates with practical ASIC hardware design and/or implementation experience; typical background includes multiple years of ASIC work — the posting lists 2+ years of professional ASIC design/implementation experience as a baseline.

Responsibilities

Primary implementation and analysis responsibilities include:

• Synthesis and logic implementation using commercial toolflows.
• Develop and maintain timing constraints; static timing analysis (STA).
• Implement ECOs and perform design linting and CDC validation.
• Power intent validation (CLP/UPF) and power-aware implementation flows.
• Power analysis, optimization, and use of PTPX / PowerPro tools.
• Model and analyze performance, area, power, and cost trade-offs for micro-architectures.
• Contribute to implementation methodologies, scripts, and flows; may perform RTL development as needed.

Requirements

Must-have technical skills and experience:

• Professional ASIC hardware design and/or implementation experience (practical baseline noted as multiple years).
• Expertise with Verilog or VHDL and ability to write synthesizable RTL.
• Strong understanding of ASIC/VLSI concepts and debugging skills.
• Experience with logic synthesis using Synopsys and/or Cadence tools.

Nice-to-have:

• Working knowledge of UPF/power intent specification and power tools.
• Experience with STA, clock-domain crossing techniques, and CDC tools.
• Experience in high-speed / low-power ASIC design within a Unix environment.
• Scripting skills (Python, Perl, TCL, or C).
• Strong written and verbal communication and collaboration skills.

Education Requirements

Bachelor's degree in Science, Engineering, or related field (plus 2+ years ASIC design/verification experience), OR Master's degree in Science, Engineering, or related field (plus 1+ years ASIC design/verification experience), OR PhD in Science, Engineering, or related field. Equivalent combinations of education and relevant ASIC experience were listed by the employer.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.