Senior ASIC Engineer - PMU
The Senior ASIC Engineer will define and implement the micro-architecture and RTL for the next-generation Power Management Unit (PMU) IP used in AI datacenter chips. This role interfaces with production software and power architecture teams to specify power features, supports silicon bring-up and debug, and ensures the PMU integrates with system software running on an on-chip RISC-V core.
The position is onsite in Shanghai and focuses on system-level power optimization and RTL implementation.
Senior β typically requires 3+ years of ASIC or related engineering experience.
Key responsibilities include architecting PMU features, implementing RTL, and supporting silicon validation and system integration.
Required skills and experience; separated into must-have and nice-to-have.
Bachelor's or Master's degree in Electrical Engineering or Computer Engineering (BS/MS) is stated; a Master's is preferred. Equivalent practical experience is acceptable.
Company: NVIDIA
Headquarters: Santa Clara, California, USA
NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.
