Senior ASIC Diagnostics & Silicon Bring-Up Engineer

Job Title

Senior ASIC Diagnostics & Silicon Bring-Up Engineer

Role Summary

Work on post-silicon validation and debugging of high-performance ASICs for AI infrastructure. The role focuses on developing diagnostics, leading silicon bring-up on characterization/validation platforms, and correlating behavior across RTL, emulation, and silicon.

Collaborate with firmware, RTL, and verification teams to isolate and resolve functional, timing/clocking, and protocol issues and to automate diagnostics into regression and continuous validation pipelines.

Experience Level

Senior — experience guidance: Bachelor’s +10 years or Master’s +5 years of relevant ASIC bring-up/post-silicon validation experience.

Responsibilities

Primary responsibilities include developing diagnostics, executing silicon bring-up, and building automation and correlation tools.

• Develop and implement diagnostics for early silicon validation and debug.
• Lead ASIC bring-up on characterization and validation platforms; validate power, reset, and clocking sequences, register access, and initialization flows.
• Design and build Python-based diagnostic frameworks for register access, configuration management, and test orchestration.
• Create diagnostics and tests for SERDES links, Ethernet, PCIe, and UCIe/chiplet interfaces; perform BER testing and SERDES margining/tuning.
• Use SDKs and internal tools to generate traffic, verify data-path correctness, and validate counters/statistics.
• Integrate and correlate results across RTL verification, emulation platforms, and silicon; develop correlation tools and methodologies.
• Perform deep debug across ASIC logic, interfaces, and firmware interactions to isolate functional mismatches, timing/clocking issues, and protocol failures.
• Develop automated diagnostics and integrate them into regression frameworks and continuous validation pipelines.

Requirements

Must-have technical skills and experience are listed below; preferred skills follow.

• Must-have: Strong experience in ASIC bring-up/post-silicon validation and hardware-software debug; proven ability to debug silicon and interfaces.
• Must-have: Proficient in Python (mandatory); experience with C/C++ and scripting.
• Must-have: Experience building diagnostic frameworks, automation tools, and test orchestration systems.
• Must-have: Experience with SERDES, networking ASICs, or chiplet/UCIe interfaces; familiarity with BER testing and SERDES tuning.
• Preferred: Familiarity with packet-processor SDKs, emulation platforms, and CI/regression infrastructure for silicon validation.

Education Requirements

Bachelor's degree with 10+ years of relevant experience, or Master’s degree with 5+ years of relevant experience (degree field not specified in the source).

About the Company

Company: Eridu AI

Headquarters: Saratoga, CA, USA

Silicon Valley-based hardware startup building infrastructure solutions for AI data centers to improve AI performance by addressing communication bottlenecks. The company focuses on high-performance ASICs and related diagnostics and has raised significant venture funding to advance its technology.