Senior ASIC DFT Engineer (Silicon)

Job Title

Senior ASIC DFT Engineer (Silicon)

Role Summary

Develop and validate Design-for-Test (DFT) architectures and test flows for next-generation ASICs used in SpaceX/Starlink space and ground systems. Work closely with systems, firmware, architecture, design, validation, and manufacturing teams to enable silicon bring-up, production testing, and yield optimization.

Experience Level

Senior - requires substantial experience (typical: 5+ years) in semiconductor DFT, post-silicon validation, or production testing on complex SoCs/ASICs.

Responsibilities

Primary responsibilities include DFT implementation through silicon characterization and test automation.

• Implement and optimize DFT architectures: scan insertion, compression/decompression, memory BIST, logic BIST using Siemens Tessent workflows.
• Integrate and verify DFT IPs and test fabrics within subsystem designs.
• Set up and run ATPG tools and methodologies for stuck-at, transition, and path delay faults; focus on pattern compression, diagnosis, and hierarchical test flows.
• Run and debug non-timing and SDF-annotated gate-level simulations.
• Create and validate DFT patterns for post-silicon bring-up and support ATE debug during silicon characterization.
• Develop test scripts and automation; analyze data using Perl, Python, Tcl, or C++.

Requirements

Required and preferred technical skills, plus work conditions and security eligibility.

• Must-have: 5+ years of experience in DFT engineering, post-silicon validation, and/or production testing on complex SoCs or ASICs.
• Hands-on experience with ATPG, pattern compression, diagnosis, and hierarchical test flows.
• Practical experience with gate-level simulation and SDF-annotated verification.
• Experience creating DFT patterns for post-silicon bring-up and supporting ATE debug.
• Scripting and automation skills in Perl, Python, Tcl, or C++ for test flow development and data analysis.
• Familiarity with Automated Test Equipment (ATE) platforms and production test development.
• Strong troubleshooting and problem-solving skills for analyzing complex test failures and driving corrective actions.
• Ability to work extended hours and weekends as needed to meet critical milestones.
• Employment eligibility: Must meet U.S. export-control/ITAR eligibility (see Education/Requirements section for details).
• Nice-to-have: Experience with low-power DFT techniques, Tessent Streaming Scan Network, cell-aware fault models, IEEE testability standards (IEEE 1500, 1687), boundary scan (IEEE 1149.1), In-System Test, and yield optimization workflows.

Education Requirements

Required: Bachelor's degree in Electrical Engineering, Computer Engineering, Physics, or a closely related technical field. Preferred: Master's or PhD in Electrical Engineering, Computer Engineering, Physics, or related engineering field. The posting also requires significant practical experience (5+ years) in lieu of advanced degree for senior-level competency. Note: applicants must meet U.S. export-control/ITAR eligibility (U.S. citizen or national, lawful permanent resident, refugee, asylee, or eligible to obtain Department of State authorization).

Compensation and Benefits

Base pay range (DFT Engineer/Senior): $165,000 - $260,000 per year. Total compensation may include long-term incentives (stock or cash awards), discretionary bonuses, employee stock purchase, medical/vision/dental coverage, 401(k), disability and life insurance, paid parental leave, paid vacation (approximately 3 weeks) and paid holidays, and sick leave per company policy.

Other Notes

Position is based in Irvine, CA. Applicants with questions about reasonable accommodations or affirmative action plan access may contact the company's compliance mailbox as listed in the original posting.

About the Company

Company: SpaceX

Headquarters: Hawthorne, California, United States

SpaceX is focused on developing space technologies to enable human exploration of Mars and beyond. The company is known for its advancements in rocketry and its Starlink satellite constellation, which delivers high-speed internet globally.