Senior ASIC Design Engineer – Clocks IP
Member of the Clocks team responsible for architecting and implementing GPU and CPU on-chip clocking. Work spans micro-architecture, RTL, timing and physical design, verification, and silicon bring-up across multiple internal teams.
Collaborate with front-end architects, physical design, timing, DFT, software, and silicon validation teams to deliver clocking solutions meeting functional, physical, and test requirements.
Senior — 3+ years of relevant work experience (as stated in the posting).
Design, implement, and deliver clocking RTL and architecture for GPUs, CPUs, and SoCs. Typical responsibilities include:
Key technical skills and experience required or strongly preferred.
Nice-to-have:
BS in Electrical Engineering or equivalent practical experience required; MS preferred. The posting allows equivalent experience in lieu of degree.
Company: NVIDIA
Headquarters: Santa Clara, California, USA
NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.
