Senior ASIC Design Engineer
ForwardEdge ASICJob Title
Senior ASIC Design Engineer
Role Summary
Lead the design and delivery of complex digital ASIC blocks, working with architects, verification engineers, and lab teams to move designs from RTL through synthesis, verification, and post-silicon validation.
Position is on the ForwardEdge ASIC engineering team, supporting commercial, aerospace, defense, and security products as a Lockheed Martin subsidiary.
Experience Level
Senior-level. Minimum of 3 years of experience as an ASIC Design Engineer.
Responsibilities
Key responsibilities include:
- Lead and mentor junior engineers on digital design blocks.
- Collaborate with architects to define and document digital/analog interfaces.
- Develop implementation plans and specifications for complex blocks.
- Write RTL using industry-standard hardware description languages.
- Create and maintain testbenches to verify functionality and features.
- Develop test plans and coordinate with Design Verification for comprehensive verification.
- Synthesize RTL, analyze results, and update RTL to meet Power, Performance, and Area (PPA) targets.
- Plan and execute post-silicon lab validation and support productization/production efforts.
- Automate flows and methodologies with scripting (e.g., Python, Perl, Tcl).
Requirements
Must-have skills and experience:
- Minimum of 3 years experience as an ASIC Design Engineer.
- Proficiency in RTL coding and hardware description languages (HDLs).
- Experience with synthesis and optimizing for PPA.
- Experience with design verification practices and testbench development.
- Familiarity with ASIC and FPGA design environments and digital/analog interfaces.
- Ability to mentor and guide junior engineers.
Nice-to-have:
- Technical leadership experience.
- Post-silicon lab validation and productization experience.
Education Requirements
Bachelor's or master’s degree in electrical engineering or computer engineering.
About the Company
Company: ForwardEdge ASIC
Engineering company focused on ASIC and FPGA design and verification, providing verification strategy, testbench development, and technical leadership for complex high-performance chip designs. Supports projects requiring US government security clearances.
