Job Title
Senior Applications and Solutions Engineer - Foundry Services
Role Summary
Provide technical support and execution for ASIC design projects within Intel Foundry Services, focusing on PDKs, digital implementation flows, and multi-voltage-domain power-intent verification. Drive design-kit quality, enable customer tape-outs, and perform complex physical design implementation.
Work with cross-functional teams in the Central Engineering Group to deliver design methods, reference flows, documentation, and customer enablement for advanced process technologies.
Experience Level
Senior β position expects experienced engineers. Guidance from the posting: typically 4+ years working with advanced CMOS processes and at least 3+ years in low-power, multi-voltage-domain ASIC implementation and verification.
Responsibilities
Primary responsibilities include customer support, design execution, quality assurance of design kits, and creation of documentation and training materials.
- Provide technical support to customers on PDKs, digital reference flows, and signoff methodologies for multi-voltage-domain designs.
- Execute ASIC physical design implementation for complex multi-voltage-domain SoCs, including level-shifters, isolation, power gating, retention, and always-on domains.
- Implement and verify power intent (UPF/CPF) and perform power-intent verification signoff using tools like VCLP and Conformal LP.
- Deliver tool/flow/methodology solutions using Cadence and Synopsys tool suites and debug implementation issues.
- Validate and improve design kits and reference flows; perform reference-flow validation and documentation review.
- Author application notes, design checklists, and training materials; present technical guidance to customers and internal teams.
- Collaborate with customers and internal stakeholders to drive successful tape-outs and implementation quality.
Requirements
Key required skills, qualifications, and clearance/citizenship requirements are listed below; preferred items are noted separately.
Must-have
- US Citizenship required and ability to obtain US government security clearance.
- 4+ years experience with advanced CMOS processes (16nm and below).
- 3+ years experience in ASIC implementation and verification focused on low-power, multi-voltage-domain designs.
- 3+ years experience with scripting (Python, Perl, Tcl, and/or shell).
- Practical experience with Cadence and Synopsys EDA tool suites for digital/physical design.
- Deep knowledge and hands-on experience with UPF/CPF implementation and debugging for multi-voltage domains, and experience with power-intent verification tools (VCLP, Conformal LP).
- Strong communication, collaboration, and customer-facing technical support skills.
Nice-to-have
- Active US government security clearance (minimum Secret).
- Experience with state-of-the-art process nodes (7nm and below).
- Hands-on physical-design implementation and verification methodology experience at block and SoC level for multi-voltage-domain designs.
- Prior customer-facing technical support or enablement experience.
Education Requirements
Minimum: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or another STEM field; qualifications may be met via a combination of industry experience, internships, coursework, or research. Preferred: postgraduate degree in a related field. Equivalent practical experience is acceptable where indicated.
About the Company
Company: Intel Corporation
Headquarters: Santa Clara, California, USA
Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.

Date Posted: 2026-05-06