Senior Analog & Mixed Signal IC Design Engineer

Job Title

Senior Analog & Mixed Signal IC Design Engineer

Role Summary

Lead design of low-power analog/mixed-signal (AMS) blocks for a terahertz vision sensor SoC, focusing on clocking, PLLs, and data converters. Work closely with RF, systems, digital, layout, and validation teams to move designs from architecture through silicon bring-up.

This is a hands-on technical leadership role with responsibility for architecture, circuit design, verification, and lab validation of jitter-sensitive analog subsystems.

Experience Level

Senior — requires substantial experience; posting requests 10+ years of hands-on analog and mixed-signal IC design experience.

Responsibilities

Primary responsibilities include architecture, design, verification, and silicon validation of clocking and data converter subsystems.

• Define low-jitter clocking architectures and top-level PLL/data-converter architectures ensuring RF and digital integration.
• Design frequency-synthesized PLLs, VCOs, ADCs (including telemetry/diagnostic ADCs), PGAs, bandgap references, and bias circuits.
• Translate system requirements into block-level specifications and lead architecture trade-off discussions (noise, jitter, power).
• Perform schematic design, pre-/post-layout simulation, and verification using industry EDA tools.
• Collaborate with layout engineers to ensure noise-immune, area-efficient physical implementations for jitter-sensitive circuits.
• Lead silicon bring-up: validation, debugging, and characterization of clocking networks and ADCs in the lab.

Requirements

Must-have technical skills, tools, and domain experience.

• 10+ years hands-on AMS IC design experience in advanced process nodes (e.g., TSMC 28nm or below).
• Demonstrated expertise in PLL design (integer/fractional-N, LC/ring VCOs) and frequency synthesis.
• Strong experience with ADC architectures (high-precision or telemetry/diagnostic ADCs), PGAs, bandgaps, and bias circuits.
• Proficiency with Cadence Virtuoso, Spectre, SpectreRF, and AMS simulation environments.
• Practical knowledge of low-power design methodologies and jitter/power trade-offs for sensor clocking.
• Experience deriving block specs from system requirements and leading cross-team integration.
• Silicon validation and lab characterization experience for clocking and data converter subsystems.

Education Requirements

MS in Electrical Engineering required with significant industry track record; PhD in Electrical Engineering preferred. Equivalent practical experience may be considered.

About the Company

Company: Teradar

Headquarters: Boston, MA, United States

Developer of a chip-scale automotive terahertz vision sensor that provides ultra-high-resolution, all-weather imaging for vehicles and defense applications, enabling improved perception and safety.