Job Title
Senior Analog/Mixed-Signal IC Design Engineer — Acacia (Hybrid)
Role Summary
Senior engineer on the Mixed-signal IC design team developing high-speed and high-accuracy analog designs for optical transceivers (100G–1T) used in data center, metro and long-haul networks. The role leads complex analog/mixed-signal blocks from architecture through production and collaborates with digital/DSP, system, package and module teams.
Experience Level
Senior. This role requires substantial prior hands-on IC design and leadership experience (see Education Requirements for degree-related experience guidelines).
Responsibilities
Primary responsibilities include technical leadership of analog/mixed-signal IC blocks and delivery of production-ready transceiver designs.
- Architect, design, layout, test, and productize ultra-deep-submicron CMOS analog/mixed-signal circuits for optical transceivers.
- Lead a large block on a complex chip, set design methodology, track deliverables, and participate in peer reviews.
- Mentor and coordinate with team members across analog, digital/DSP, package, board and module design groups.
- Collaborate with packaging and hardware teams to meet signal and power integrity specifications.
- Develop and validate high-speed AMS circuits and integrate them into ASIC-level designs.
Requirements
Must-have technical skills and experience; degrees and years-of-experience are listed under Education Requirements.
- Proven design, simulation and measurement experience of high-speed ICs covering at least three of the following areas: high-speed serial links (SERDES), serializers/deserializers, data converters, voltage regulators, output drivers, phase-locked loops, clock transmission/propagation, op-amps, programmable gain amplifiers, and equalization.
- Hands-on experience with high-speed analog/mixed-signal circuit design and test in advanced CMOS processes.
- Experience taking analog/mixed-signal IP from concept through tapeout and production validation.
- Strong skills in circuit simulation, silicon validation and problem debugging.
Nice-to-have / Preferred:
- Experience with electrical transceiver applications (backplane and cable communications) and transceiver system constraints.
- Experience with FinFET technology and high-frequency layout (passives, transformers, transmission lines).
- Floorplanning for mixed-signal chips, custom transistor layout, DFM practices, and ESD lab methodology.
- Familiarity with Cadence Virtuoso, Spectre/APS/SpectreX, MATLAB, EMX and mixed-signal simulation flows.
Education Requirements
Minimum degree and equivalent-experience options stated by the employer: BSEE with 12+ years' experience, MS with 8+ years' experience, or PhD with 5+ years' experience; equivalent practical experience accepted. (This posting lists degree-level experience equivalencies; specific hiring requirements may vary by location.)
About the Company
Company: Cisco Systems
Headquarters: San Jose, CA, United States
Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).

Date Posted: 2026-05-29