Job Title
Senior Analog/mixed-signal IC Design Engineer - Acacia (Hybrid)
Role Summary
Member of the Mixed-signal IC design group for Acacia developing high-speed and high-accuracy analog designs for optical communications transceivers. The role focuses on architecting, designing, laying out, measuring, and productizing CMOS-based AMS blocks that integrate into complex ASICs.
The position works cross-functionally with digital/DSP, system, package, and module teams to meet signal and power integrity targets and bring high-performance transceiver products to production.
Experience Level
Senior. Typical experience guidance per company minimums: approximately 8β12+ years depending on degree (see Education Requirements for details).
Responsibilities
Deliver and own complex mixed-signal IC blocks from concept through production; lead technical efforts and collaborate across teams.
- Architect, design, layout, test, and productize ultra-deep-submicron CMOS analog and mixed-signal circuits.
- Lead a large block on complex chips, track deliverables, and participate in peer design reviews.
- Mentor junior engineers and provide design methodology and best practices.
- Develop high-speed AMS circuits (serial links, data converters, PLLs, equalizers, etc.) that meet performance and manufacturability targets.
- Collaborate with packaging and hardware teams to ensure signal and power integrity across package and module boundaries.
- Support layout floorplanning, DFM reviews, and manufacturing transitions.
Requirements
Must-have technical experience (degree and years moved to Education Requirements):
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Must-have: Demonstrated design, simulation, and measurement experience of high-speed ICs in at least three of the following areas: serializers/deserializers, data converters, voltage regulators, output drivers, phase-locked loops (PLLs), clock transmission/propagation, op amps, programmable gain amplifiers, and equalization.
- Proven track record with high-speed analog/mixed-signal circuit development and lab characterization.
- Experience with mixed-signal simulations and verification flows.
- Ability to lead design reviews and deliver production-ready IP.
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Nice-to-have: Experience with transceiver applications (backplane/cable), FinFET technology, high-frequency layout (passives, transmission lines, transformers), custom transistor layout, floorplanning for mixed-signal chips, ESD lab practices, and DFM/manufacturability considerations.
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Tools: Familiarity with Cadence Virtuoso, Spectre/APS/SpectreX, Matlab, EMX, and AMS simulation environments is preferred.
Education Requirements
Minimum degree/experience combinations listed by the employer: BSEE with 12+ years of relevant experience, MS with 8+ years, or PhD with 5+ years, or equivalent practical experience. The posting specifically references electrical/EE degrees and allows equivalent professional experience in lieu of the listed degrees.
About the Company
Company: Cisco Systems
Headquarters: San Jose, CA, United States
Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).

Date Posted: 2026-05-27