Senior Analog/Mixed-Signal IC Design Engineer - Acacia (Hybrid)
Cisco SystemsJob Title
Senior Analog/Mixed-Signal IC Design Engineer - Acacia (Hybrid)
Role Summary
Senior individual contributor on the Mixed-Signal IC design team for Acacia optical transceivers. The team develops high-speed and high-accuracy analog/mixed-signal circuits for optical communications products that integrate into ASICs used in data center and carrier networks.
This is a hybrid role requiring three days per week at the San Jose, CA office.
Experience Level
Senior-level. See Education Requirements for the employer's minimum years-of-experience expectations tied to academic credentials.
Responsibilities
Accountable for architecture, design, verification, and productization of high-speed analog/mixed-signal IC blocks. Key responsibilities include:
- Architect, design, layout-review, measure, and productize ultra-deep-submicron CMOS analog/mixed-signal circuits for optical transceivers.
- Lead design efforts for large/complex chip blocks, set design methodology, and track schedule and deliverables.
- Mentor junior engineers, conduct peer design reviews, and improve team processes.
- Collaborate with digital/DSP, system, package, and module teams to meet signal and power integrity requirements.
- Develop and validate high-speed AMS circuits from concept through production, including lab characterization and debug.
Requirements
Must-have technical skills and experience (must satisfy core items):
- Hands-on experience designing, simulating, and measuring high-speed analog/mixed-signal ICs across multiple blocks (required to cover at least three areas below).
- Experience with high-speed serial links including serializers/deserializers and data converters.
- Experience with PLLs/clock distribution, output drivers, voltage regulators, op amps, programmable gain amplifiers, and equalization techniques.
- Practical lab measurement and characterization skills for high-speed transceiver circuits.
- Strong analog layout awareness and ability to work with layout engineers on custom transistor layouts and floorplanning.
Nice-to-have:
- Experience with FinFET processes, passive RF components (inductors, transformers, transmission lines), and high-frequency layout.
- Experience designing for manufacturability and ESD lab practices.
- Familiarity with Cadence Virtuoso, Spectre/APS/SpectreX, MATLAB, EMX, and mixed-signal AMS simulation flows.
Education Requirements
Minimum qualifications stated by the employer: BSEE with 12+ years of relevant experience, MS (or equivalent) with 8+ years, or PhD (or equivalent) with 5+ years. Fields implied: Electrical/Electronics/Analog IC engineering or closely related technical disciplines. Employer accepts equivalent practical experience in lieu of degrees.
About the Company
Company: Cisco Systems
Headquarters: San Jose, CA, United States
Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).
