Senior Analog/Mixed-Signal IC Design Engineer - Acacia (Hybrid)

Job Title

Senior Analog/Mixed-Signal IC Design Engineer - Acacia (Hybrid)

Role Summary

Member of the Acacia mixed-signal IC design group responsible for developing high-speed and high-accuracy analog circuits for optical transceivers (100G–1T). Work spans architecture, circuit design, layout, measurement, and productization of ultra-deep sub-micron CMOS AMS blocks.

This is a hybrid role requiring three days per week at the San Jose, CA office.

Experience Level

Senior. Typical experience guidance: BSEE +12 years, MS +8 years, or PhD +5 years of relevant experience, or equivalent practical experience.

Responsibilities

Design, validate, and productize complex mixed-signal IC blocks; lead and mentor across design cycles and collaborate with system, package, and hardware teams.

• Architect, design, layout, and validate ultra-deep sub-micron CMOS AMS circuits for optical transceivers.
• Lead design efforts for large blocks on complex chips; manage deliverables and conduct peer reviews.
• Collaborate with packaging and hardware teams to ensure signal and power integrity.
• Develop high-speed serial links and analog IP (serializers/deserializers, data converters, PLLs, drivers, opamps, PGAs, equalizers).
• Support lab measurement, characterization, and transfer to manufacturing for production readiness.

Requirements

Must-have technical skills and experience.

• Proven ability to design, simulate, and measure high-speed ICs across multiple domains (e.g., serializers/deserializers, data converters, voltage regulators, output drivers, PLLs, clock transmission/propagation, opamps, PGAs, equalization).
• Demonstrated leadership on complex IC blocks and experience mentoring engineers.
• Hands-on experience with mixed-signal simulations and laboratory measurement practices.
• Working knowledge of signal and power integrity for package/module integration.

Nice-to-have:

• Experience with electrical transceiver applications (backplane and cable communications) and FinFET technology.
• High-frequency layout (passives, transmission lines), custom transistor layout, floorplanning, and DFM experience.
• Familiarity with ESD laboratory practices.
• Experience with Cadence Virtuoso, Spectre/APS/SpectreX, Matlab, EMX and AMS simulation flows.

Education Requirements

BSEE (Electrical Engineering) with ~12+ years, MS with ~8+ years, or PhD with ~5+ years of relevant experience; or equivalent practical experience.

About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).