Senior Analog/Mixed-Signal IC Design Engineer — Acacia (Hybrid)

Job Title

Senior Analog/Mixed-Signal IC Design Engineer — Acacia (Hybrid)

Role Summary

Senior analog/mixed-signal IC design engineer on the Acacia mixed-signal group developing high-speed, high-accuracy CMOS designs for optical transceivers (100G–1T). The role focuses on architecture, circuit design, layout, measurement and productization of ultra-deep-submicron ICs that integrate into larger ASICs and modules.

Experience Level

Senior-level role. Hiring expectations in the posting indicate senior experience (examples include multi-year experience thresholds tied to degree level).

Responsibilities

You will lead complex analog/mixed-signal IC workstreams from concept through production and collaborate with cross-functional teams.

• Architect, design, layout, characterize and productize ultra-deep-submicron CMOS analog and mixed-signal circuits for optical transceivers.
• Lead a large block on complex chips, mentor engineers, track deliverables and participate in peer design reviews.
• Collaborate with digital/DSP, system, package and module teams to meet signal and power integrity requirements.
• Develop and optimize high-speed AMS circuits (serdes, data converters, PLLs, drivers, equalizers) and ensure manufacturability.
• Perform simulations, lab measurements and validation to transition designs into production.

Requirements

Must-have technical skills and experience (extracted from minimum and preferred qualifications). Degree requirements are summarized separately under Education Requirements.

• Extensive hands-on experience designing, simulating and measuring high-speed ICs in at least three areas such as high-speed serial links (serializers/deserializers), data converters, voltage regulators, output drivers, PLLs/clock distribution, op amps, programmable gain amplifiers and equalization.
• Proven track record of taking analog/mixed-signal designs from concept to production, including block-level ownership on complex chips.
• Experience with high-speed signal and power integrity considerations and collaboration with packaging/hardware teams.
• Experience with mixed-signal simulations and verification workflows.
• Strong debugging, measurement and lab characterization skills for AMS circuits.

Nice-to-have / preferred:

• Experience with electrical transceiver applications (backplane and cable communications) and FinFET technologies.
• High-frequency layout and passive component design (inductors, transformers, transmission lines), floorplanning and custom transistor layout.
• Design-for-manufacturability and ESD laboratory practices.
• Familiarity with Cadence Virtuoso, Spectre/APS/SpectreX, Matlab and EMX; experience with AMS simulation flows.

Education Requirements

Posting lists degree-or-equivalent experience options: BSEE with 12+ years of experience, MS with 8+ years, or PhD with 5+ years, or equivalent practical experience. Field of study referenced: Electrical Engineering (or equivalent technical discipline).

About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).