Job Title
Senior Analog/Mixed-Signal IC Design Engineer β Acacia
Role Summary
Hybrid role based in San Jose, CA (three days on-site) within Acacia's mixed-signal IC design group. The team develops high-speed and high-accuracy analog circuits and integrates them into optical transceiver ASICs for 100G, 400G and 1T applications.
The role focuses on architecting, implementing, validating and productizing CMOS analog/mixed-signal IP and blocks, and coordinating with digital/DSP, system, package and module teams.
Experience Level
Senior level. Experience guidance from the posting: PhD + 5+ years, MS + 8+ years, or BS + 12+ years (equivalent practical experience accepted).
Responsibilities
Primary responsibilities include hands-on design, leadership of complex blocks, and cross-team integration.
- Architect, design, layout, characterize and productize ultra-deep-submicron CMOS analog/mixed-signal circuits for optical transceivers.
- Lead a large block on complex chips: set technical direction, track deliverables, conduct peer reviews, and establish robust design methodology from concept through production.
- Mentor and guide junior engineers and coordinate multi-discipline efforts with digital/DSP, system, package and module teams.
- Collaborate with packaging and hardware teams to meet signal and power integrity targets.
- Develop and optimize high-speed AMS circuits (e.g., SERDES front-ends, PLLs, data converters) and validate performance through measurement and simulation.
Requirements
Must-have technical skills and experience; preferred items listed separately.
- Demonstrated design, simulation and measurement of high-speed ICs across multiple areas such as serializers/deserializers, data converters, voltage regulators, output drivers, PLLs, clock transmission/propagation, op amps, programmable gain amplifiers, and equalization (experience in at least three areas required).
- Hands-on layout and verification experience for high-speed and high-accuracy analog circuits.
- Practical experience with mixed-signal simulations and lab characterization workflows.
- Nice-to-have: electrical transceiver application experience (backplane/cable), FinFET process experience, high-frequency layout (passives, transmission lines, transformers), floorplanning for power/ground and mixed-signal routing, custom transistor layout, design-for-manufacturability, and ESD lab practices.
- Tool experience preferred: Cadence Virtuoso, Spectre/APS/SpectreX, MATLAB, EMX and AMS simulation environments.
Education Requirements
Posting specifies degree-based options or equivalent experience: BSEE with 12+ years of relevant experience, MS with 8+ years, or PhD with 5+ years. Fields referenced or implied: Electrical Engineering (EE) or related technical disciplines. Equivalent practical experience is accepted.
About the Company
Company: Cisco Systems
Headquarters: San Jose, CA, United States
Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).

Date Posted: 2026-05-19