Senior Analog/Mixed-Signal IC Design Engineer - Acacia

Job Title

Senior Analog/Mixed-Signal IC Design Engineer - Acacia (Hybrid)

Role Summary

Member of a mixed-signal IC design group focused on high-speed and high-accuracy analog designs for optical transceivers (100G, 400G, 1T) used in data center, metro, and long-haul networks. The role spans architecture, circuit design, layout, measurement, and productization of ultra-deep-submicron CMOS ICs.

This is a hybrid role based in San Jose, CA with collaboration across digital/DSP, system, package, and module teams to deliver production-ready transceiver chips.

Experience Level

Senior-level. Experience guidance is provided under Education Requirements (examples: BSEE +12 years, MS +8 years, PhD +5 years, or equivalent experience).

Responsibilities

Primary responsibilities include leading complex analog/mixed-signal blocks from concept to production and collaborating across multiple engineering disciplines.

• Architect, design, lay out, measure, and productize analog and mixed-signal CMOS blocks for high-speed optical transceivers.
• Lead design efforts for large blocks on complex chips; track deliverables and drive schedules.
• Mentor junior engineers, conduct peer design reviews, and define design methodology and verification plans.
• Collaborate with packaging, hardware, and system teams to meet signal and power integrity specifications.
• Develop high-speed AMS circuits and support their integration into ASICs and modules.

Requirements

Must-have technical skills and domain experience listed first, followed by preferred skills.

• Must-have: Proven design, simulation, and measurement experience for high-speed analog/mixed-signal ICs covering serializers/deserializers, data converters, PLLs, output drivers, op amps, programmable gain amplifiers, equalization, clock transmission/propagation, and voltage regulators.
• Proficiency with Cadence Virtuoso and Spectre/APS/SpectreX or equivalent mixed-signal design and simulation tools; experience with AMS simulation flows.
• Hands-on measurement and laboratory validation experience for high-speed transceivers and signal/power integrity testing.
• Experience leading large IC block designs, performing peer reviews, and delivering production-suitable designs.
• Nice-to-have: Experience with FinFET technologies; high-frequency layout and passive component design (inductors, transformers, transmission lines); floorplanning for mixed-signal chips; custom transistor layout; design for manufacturability; ESD lab practices; experience with Matlab and EMX.

Education Requirements

Minimum qualifications: BSEE with 12+ years of relevant experience, or MS with 8+ years, or PhD with 5+ years, or equivalent practical experience. Fields referenced include Electrical Engineering and related technical disciplines. No specific certifications are required in the posting.

About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).