Job Title
Senior Analog/Mixed-Signal IC Design Engineer — Acacia
Role Summary
Senior engineer on the Mixed-Signal IC design team responsible for architecture, design, layout, measurement and productization of ultra-deep-submicron CMOS transceivers for optical communications.
Work on high-speed and high-accuracy analog/mixed-signal building blocks that integrate into ASICs; collaborate with digital/DSP, package, system and module teams. This is a hybrid role with three days per week at the San Jose, CA office.
Experience Level
Senior. Posting specifies degree-based experience guidance (see Education Requirements) or equivalent practical experience.
Responsibilities
Key responsibilities include design leadership, hands-on circuit development, verification, and cross-team coordination.
- Architect, design, layout, measure and productize ultra-deep-submicron CMOS ICs for high-speed optical transceivers.
- Lead large design blocks on complex chips; define and track deliverables and schedules.
- Mentor and review work of other engineers; perform peer reviews and enforce design methodology from concept through production.
- Collaborate with packaging and hardware teams to meet signal integrity and power integrity requirements.
- Develop high-speed analog/mixed-signal circuits and support their integration into ASICs and modules.
Requirements
Must-have technical skills and experience relevant to the role.
Must-have:
- Design, simulation and measurement experience for high-speed ICs, including at least three of the following domains: high-speed serial links (SERDES), data converters, voltage regulators, output drivers, phase-locked loops (PLLs), clock transmission/propagation, operational amplifiers, programmable gain amplifiers, and equalization.
- Hands-on experience with analog/mixed-signal verification, simulation and lab measurement techniques.
- Experience delivering designs that move from concept into production.
Nice-to-have:
- Experience with electrical transceiver applications (backplane and cable communications).
- Experience with FinFET technologies and high-frequency/custom transistor layout.
- Passive component and transmission-line layout experience (inductors, transformers, transmission-lines).
- Floorplanning experience (power/ground, digital/analog routing) and design-for-manufacturability practices.
- ESD laboratory practices and methodology.
- Familiarity with Cadence Virtuoso, Spectre/APS/SpectreX, MATLAB, EMX and mixed-signal (AMS) simulation flows.
Education Requirements
Degree and experience options stated in the posting: B.S. in Electrical Engineering (BSEE) with ~12+ years of experience, or M.S. with ~8+ years, or Ph.D. with ~5+ years, or equivalent practical experience. Fields referenced imply electrical/electronic engineering or closely related technical disciplines. Certification requirements are not specified.
About the Company
Company: Cisco Systems
Headquarters: San Jose, CA, United States
Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).

Date Posted: 2026-06-30