Senior Analog Layout Engineer

Job Title

Senior Analog Layout Engineer

Role Summary

As a Senior Analog Layout Engineer in Central Engineering, you will produce analog and mixed-signal layouts used across multiple product domains (Automotive, Storage, Security, Networking). The role partners with designers and global engineering teams to deliver high-speed and precision analog IP across multiple process nodes.

Small team environment with scope for deep technical ownership, mentoring, and cross-site collaboration.

Experience Level

Senior-level. The posting expects an experienced engineer able to lead layout efforts and mentor others; no specific years-of-experience were listed.

Responsibilities

Primary responsibilities include layout implementation, verification, and collaboration with distributed design teams.

• Create and optimize analog/mixed-signal floorplans and layouts using industry CAD tools (e.g., Cadence Virtuoso).
• Run layout verification, LVS/DRC checks, and simulation-driven iterations with designers to meet specifications.
• Deliver layouts for high-speed and precision analog circuits across multiple process nodes.
• Participate in the project lifecycle: planning, layout, verification, delivery, and post-silicon support.
• Provide technical mentorship and present status or technical issues to global project teams.
• Coordinate and communicate frequently with teams in different time zones (Argentina, Singapore, U.S., Europe).

Requirements

Key required skills and constraints.

• Practical understanding of electrical and analog layout concepts.
• Proven experience using CAD layout tools to implement microelectronic layers beyond schematics; experience with Cadence Virtuoso preferred.
• Track record delivering high-speed or precision analog circuit layouts; experience across multiple process nodes preferred.
• Ownership of tasks from cells to macros and full interfaces; able to drive work through the full development cycle.
• Strong written and verbal communication skills for cross-site collaboration and reporting.
• Eligible to access export-controlled technology; non-U.S. applicants may be subject to export license review.
• Interview integrity requirement noted: candidates must not use AI assistance during interviews.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering (undergraduate or graduate) is indicated as the typical background; equivalent practical experience will be considered.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.