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Senior Analog Design Engineer

Synopsys
May 26, 2026
Full-time
On-site
Yerevan, AM
Semiconductor IP Jobs, Level - Senior

Job Title

Senior Analog Design Engineer

Role Summary

Work in the PLL analog mixed-signal group to design, verify, and maintain physical-layer PLLs for high-speed wireline data communication across MAC protocols for mobile, automotive, and consumer markets.

The role focuses on mixed-signal verification, collaboration with design and layout teams, and supporting multiple process technologies and nodes.

Experience Level

Senior-level. The posting does not specify years of required experience.

Responsibilities

Primary responsibilities include verification, maintenance, and cross-team collaboration for PLL-based mixed-signal blocks.

  • Own verification and maintenance of major blocks or entire PLLs.
  • Develop and implement mixed-signal verification plans based on architecture and specifications.
  • Design and build verification testbenches using industry-standard verification languages and methodologies.
  • Run simulations, review and analyze verification results, and provide actionable feedback to design teams.
  • Collaborate with design and layout teams to identify and resolve design issues across process nodes.
  • Maintain clear documentation of verification plans, test results, and design changes (MS Office skills required).

Requirements

Must-have technical skills and tools for the role; nice-to-have items listed separately.

  • Strong understanding of analog and mixed-signal circuit design and verification principles (transistor-level focus).
  • Experience with PLL loop design and high-precision analog circuits (linear regulators, bandgap references, current sources, analog filters).
  • Practical experience with EDA tools such as Synopsys Custom Compiler, HSPICE, and AMS simulators.
  • Programming or scripting ability in Python; ability to write efficient scripts for automation.
  • Ability to document verification plans and results clearly (MS Office proficiency).
  • Ability to work across technologies and process nodes and collaborate with cross-functional teams.

Nice-to-have:

  • Experience with Verilog or Verilog-A.

Education Requirements

Bachelor of Science in Electrical Engineering required; Master of Science (preferred). Fields: high-performance analog/mixed-signal design and verification principles.


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

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Date Posted: 2026-05-24