Senior AI Systems Architect/Researcher

Job Title

Senior AI Systems Architect/Researcher

Role Summary

Senior architect/researcher who translates communication, memory, and orchestration bottlenecks in large-scale AI into networking and platform architecture, IP, and software direction. Works across research, architecture, silicon, software, and product teams to influence multi-generation roadmaps for distributed AI infrastructure.

This is a research-oriented, pathfinding role focused on AI-scale data movement across xPUs, DPUs/IPUs, NICs, memory, and heterogeneous storage; on-site presence is required.

Experience Level

Senior - the role requires advanced experience: Master's +5 years relevant experience, or PhD +2 years (per minimum qualifications).

Responsibilities

Translate workload and systems analysis into architecture and product requirements; drive cross-disciplinary hardware-software solutions for AI data movement and networking.

• Analyze AI training and serving workloads to identify communication and memory bottlenecks and derive concrete architecture and IP requirements.
• Define architectural direction for data movement across xPU-to-xPU, xPU-to-storage, and cross-node paths, including packet processing and transport design.
• Drive hardware-software co-design across compute, DPU/IPU, NIC, SoC fabric, and AI runtimes to integrate networking/data-movement capabilities.
• Investigate system-level bottlenecks (KV-cache, disaggregated prefill/decode, model/tensor parallelism, collectives) and propose architectural mitigations.
• Set multi-generation roadmaps and align architecture across networking, SoC fabric, firmware/OS/drivers, and performance modeling teams.
• Communicate research findings, contribute to scientific literature, and participate in IP development as appropriate.

Requirements

Core technical and practical skills required; degree requirements are summarized in Education Requirements below.

• Must-have: Hands-on experience with modern AI training and/or inference systems and serving stacks (practical experience with vLLM, SGLang, or equivalent), and familiarity with model/tensor parallelism and disaggregated workflows.
• Must-have: Experience in computer architecture and system-level design focused on networking, interconnect, or memory subsystems.
• Must-have: Proficiency in C/C++ and/or Python.
• Must-have: Proven ability to perform workload and memory hierarchy bottleneck analysis and translate findings into architecture or product requirements.
• Nice-to-have: Experience with RDMA/RoCE, InfiniBand, or equivalent high-performance transports and programmable packet processing.
• Nice-to-have: Experience with IPU/DPU/SmartNIC or accelerator-centric SoCs, and familiarity with PCIe, CXL, and memory semantics for high-performance I/O.
• Nice-to-have: Track record of defining architecture from concept through silicon or shipping product and cross-team technical leadership.

Education Requirements

Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related STEM field with 5+ years of relevant experience; or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related STEM field with 2+ years of relevant experience. Related STEM fields are acceptable per the minimum qualifications. No specific certifications were listed.

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.