RTL2GDS Lead AE

Job Title

RTL2GDS Lead AE

Role Summary

Senior Field Applications Engineer focused on digital implementation and signoff. Work directly with customers to deploy Cadence synthesis, place-and-route, and signoff technologies to meet PPA and design-closure targets.

Collaborate with Cadence R&D to drive product requirements and improve tools and flows. Engage in technical evaluations, benchmarks, and customer enablement.

Experience Level

Senior-level. The role expects experienced engineers; the posting lists a minimum of 5 years of industry physical-design experience.

Responsibilities

Provide technical leadership and customer-facing support across backend digital implementation and signoff.

• Support customers on backend flows: place & route, design closure, timing and power signoff.
• Guide customers to use Cadence tools to achieve project schedules and PPA goals.
• Deliver technical presentations and product demonstrations.
• Plan and execute technical evaluations and benchmarks.
• Collaborate with R&D to improve tools, methodologies, and product direction.
• Drive adoption and proliferation of tools and validated flows.
• Develop or adapt flows and automation using Tcl/Perl/Python to improve results.
• Capture and share best practices and lessons learned from engagements.

Requirements

Must-have technical skills and experience required for successful performance in this role.

• Minimum 5 years of industry physical-design experience.
• Strong knowledge of digital-design fundamentals, semiconductor fundamentals, and static timing analysis (STA).
• Experience with IC digital implementation flows and backend EDA tools: place & route, IR drop analysis, timing and power closure.
• Experience with advanced process nodes (10nm and below).
• Proficiency in scripting (Tcl, Perl, Python) to adapt and automate flows.
• Strong customer-facing communication and problem-solving skills.
• Ability to plan and execute technical benchmarks and communicate results to technical and engineering audiences.

Preferred:

• Experience with front-end EDA tools: synthesis, DFT, logical equivalence checking.
• Experience with Cadence toolset (examples: Genus, Innovus, Conformal, Tempus, Modus, Voltus, ICC/ICC2, DC, PrimeTime).
• Experience with advanced nodes (5nm and below).

Education Requirements

Required: BS in Computer Science, Computer Engineering, Electrical Engineering, or a related technical field. Preferred: MS in the same fields. (Education listed in the posting; no alternate-equivalent-experience language was specified.)

About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.