RTL Design Sign Off Lead
BroadcomJob Title
RTL Design Sign Off Lead
Role Summary
Lead the RTL sign-off effort for complex, high-speed IP delivered to SoC teams. Act as the technical authority for synthesis constraints, full-chip CDC/RDC methodology, and synchronization strategies across multiple clock and reset domains in advanced process nodes.
Work closely with Architecture and Chip Lead teams to review DFT, clocking and reset architectures early in the design cycle, and drive zero-defect silicon through rigorous constraint and waiver management and automated sign-off flows.
Experience Level
Senior — 8+ years of related experience.
Responsibilities
The role is responsible for establishing and enforcing RTL sign-off practices and delivering sign-off-ready IP to SOC teams.
- Define and enforce synchronization strategies across complex, multi-clock and multi-reset domains.
- Create and maintain synthesis constraints and manage constraint waivers to meet silicon quality goals.
- Develop and own full-chip CDC/RDC sign-off methodology and flows.
- Perform structural and functional verification of clock/reset crossings using industry tools.
- Collaborate with Architecture and Chip Leads to review testability, DFT, clocking and reset architectures early in the design.
- Identify and mitigate potential metastability and reset-glitch issues before RTL freeze.
- Mentor engineers on Synthesis, DFT, CDC/RDC best practices and drive automation to scale sign-off across global teams.
Requirements
Key must-have and preferred technical qualifications (education details are listed under Education Requirements below).
- Must-have: Deep expertise in Synthesis, DFT, and CDC/RDC sign-off for complex IP.
- Must-have: Proven experience with industry sign-off and verification tools (examples: SpyGlass CDC/RDC, SpyGlass Lint, JasperGold, Meridian).
- Must-have: Demonstrated ability to define constraints and drive automated sign-off flows for multi-site teams.
- Nice-to-have: Experience with high-speed interfaces (SerDes, LPDDR5/6, DDR4/5, HBM) where asynchronous boundaries are critical.
- Nice-to-have: Experience mentoring engineers and leading cross-team technical reviews.
Education Requirements
Bachelor of Science in Electrical Engineering (BSEE) required; Master of Science in EE (MSEE) or PhD preferred. (Degree requirement explicitly stated in source.)
About the Company
Company: Broadcom
Headquarters: Irvine, California, United States
Broadcom is a global technology leader that designs, develops, and supplies a wide range of semiconductor and infrastructure software solutions. The company is known for its innovations in wireless and broadband communications, enabling a connected world.
