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RTL Design Principal Engineer

Marvell Technology
May 09, 2026
Full-time
On-site
Bengaluru, Karnataka, India
RTL Design Jobs, Level - Senior

Job Title

RTL Design Principal Engineer

Role Summary

Responsible for defining subsystem architecture, micro-architecture and register specifications, implementing RTL, and leading full-chip integration for complex SoCs within Marvell Data Centre Engineering (Compute & Storage) business unit.

The role partners with cross-functional teams including IP vendors, physical design, verification, post-silicon validation and software to deliver high-performance data processing platforms for carrier, cloud/enterprise, AI and automotive markets.

Experience Level

Senior — 12+ years of related professional experience.

Responsibilities

Key responsibilities include architecture, RTL implementation, integration, verification collaboration and mentoring.

  • Define subsystem architecture, micro-architecture and register specifications for complex SoCs.
  • Conduct performance, architectural and design-requirement reviews with cross-functional teams, IP vendors and customers.
  • Implement specifications using RTL coding best practices.
  • Work with third-party IP vendors to define customization requirements for controllers, PHYs and other IP blocks.
  • Coordinate with physical design for floorplanning, power analysis, synthesis and timing signoff.
  • Collaborate with verification on test plans, coverage analysis, full-chip simulation and emulation, and debug performance and power issues.
  • Support post-silicon bring-up and software integration for prototype tuning and validation.
  • Contribute to and improve design and verification methodologies; provide mentorship to junior engineers.

Requirements

Must-have technical skills and experience; nice-to-have items listed separately.

  • Must-have: Strong Verilog/SystemVerilog RTL coding skills, including SystemVerilog assertions (SVA).
  • Must-have: Deep experience across ASIC design flow stages, including specification, architecture, design implementation and full-chip integration.
  • Must-have: Experience owning architecture and design for complex chips or subsystems (network processors, CPUs, GPUs, NOCs, switches, ML SoCs).
  • Must-have: Scripting experience (Perl, Python, Shell) for automation and analysis.
  • Must-have: Experience working with third-party IP and vendors.
  • Nice-to-have: Expertise in networking, embedded systems architecture, computer architecture or machine-learning accelerators.

Education Requirements

Bachelor's or Master's degree and/or PhD in Computer Science, Electrical Engineering, or a related technical field (as stated in the posting).


About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.

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Date Posted: 2026-05-09