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RTL Design Engineer

Teradyne
May 19, 2026
Full-time
On-site
North Reading, Massachusetts, United States
$123,100 - $196,900 USD yearly
RTL Design Jobs, Level - Senior

Job Title

RTL Design Engineer

Role Summary

Design RTL for advanced-node mixed-signal ASICs in Teradyne's Silicon Technology Engineering (STE) Digital ASIC Group. Collaborate with chip architects, analog engineers, verification, and physical design teams across specification, micro-architecture, RTL, verification, timing closure, and silicon bring-up.

Deliver high-quality RTL for large mixed-signal SOCs and memory test instruments used in production semiconductor test systems.

Experience Level

Senior β€” typically requires 5+ years of RTL/ASIC design experience.

Responsibilities

Primary responsibilities include design, integration, verification collaboration, and silicon bring-up:

  • Develop specifications, micro-architecture, and RTL for mission-critical ASIC blocks.
  • Integrate industry-standard and Teradyne custom IP blocks.
  • Collaborate with verification on test plans, debug support, and coverage closure.
  • Provide timing constraints and STA support to physical design for timing closure.
  • Support post-silicon lab bring-up and debugging.
  • Automate design and verification tasks using scripting and build tools.

Requirements

Must-have technical skills and experience:

  • Extensive RTL design experience in Verilog, including state machines, FIFOs, high-speed datapaths, arbitration logic, and DFT.
  • Experience with logic synthesis and timing constraints.
  • Experience with clock domain crossings (CDC) and static timing analysis (STA).
  • Experience with high-speed memory interfaces and serial interfaces.
  • Proficiency in scripting/automation (Python, Tcl, Make or similar) for design flows.
  • Ability to collaborate with analog, verification, and physical design teams and provide silicon debug support.

Nice-to-have:

  • Experience with advanced-node ASIC design and large mixed-signal SOCs.
  • Familiarity with tools and flows for timing closure and post-silicon bring-up.

Education Requirements

Bachelor of Science (BSEE) or Master of Science (MSEE) in Electrical Engineering or a related field is specified. The posting indicates 5+ years of relevant experience.


About the Company

Company: Teradyne

Headquarters: North Reading, Massachusetts, United States

Teradyne is a global leader in test and automation solutions, ensuring every electronic device performs effectively. Their sophisticated technology helps manufacturers develop and deliver products quickly and cost-effectively, supporting various industries worldwide. With a strong commitment to fostering a diverse and inclusive work environment, Teradyne encourages innovation and collaboration among its employees.

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Date Posted: 2026-05-18