RTL Design Engineer

Job Title

RTL Design Engineer

Role Summary

Design and implement RTL modules for video-processing IP, covering specification, architecture, coding, simulation, and synthesis. Work within the SoC research team at the Daegu research site to deliver RTL blocks and support verification and integration activities.

Experience Level

Mid-level. The posting does not state a specific years-of-experience requirement.

Responsibilities

Primary responsibilities include delivering RTL modules and maintaining verification infrastructure.

• Define video module specifications and design macro/micro architecture.
• Develop RTL code (Verilog) and perform simulation and synthesis-driven development.
• Use scripting to maintain and enhance RTL blocks and verification environments.
• Debug hardware behavior using EDA simulation and verification tools; address lint and CDC issues.
• Support FPGA-based verification when required.

Requirements

Essential technical skills and tools required for the role.

• Must-have: Hands-on experience in hardware design using Verilog RTL.
• Must-have: Design and verification experience with Verilog HDL and C/C++.
• Must-have: Proficiency with EDA tools for RTL simulation, debugging, synthesis, linting, and CDC analysis.
• Nice-to-have: Python and Linux scripting for automation and tool integration.
• Nice-to-have: Verification experience using FPGA platforms.

Education Requirements

The posting references a bachelors degree (starting annual salary of 50 million won tied to a bachelors degree). No other specific degrees, fields of study, certifications, or explicit "or equivalent experience" language are stated.

About the Company

Company: Chips &Media

Headquarters: Seoul, South Korea

South Korea–based semiconductor company specializing in video codec IP and related hardware IP development, including RTL design, verification, FPGA development, and customer support for multimedia semiconductor solutions.