R&D Principal Architect, Package Substrate EDA

Job Title

R&D Principal Architect, Package Substrate EDA

Role Summary

Principal technical architect responsible for the architecture and delivery of package substrate design automation within the 3DIC portfolio. The role directs R&D projects across routing, power delivery network analysis, DRC engines, and database models and works closely with executive R&D leadership, cross-functional engineering teams, and manufacturing partners.

Experience Level

Senior (Principal-level technical leadership). This role requires substantial R&D and architecture experience consistent with a senior principal engineer.

Responsibilities

Lead architecture, implementation, and customer/manufacturing engagement for substrate EDA tooling. Key responsibilities include:

• Define technical architecture for substrate automation: auto-routing, PDN analysis, DRC engines, and data models.
• Drive new technical solutions and influence product roadmap with executive R&D leadership for 3DIC.
• Develop and optimize production-quality EDA software in C++, Python, and TCL to solve computational geometry and physical-design challenges at scale.
• Integrate with collateral formats and analysis tools and validate designs for manufacturing readiness.
• Partner with foundries and assembly/test companies to translate manufacturing constraints into tooling requirements.
• Provide technical mentorship and architectural guidance to engineering teams.
• Present complex technical tradeoffs and architectural decisions to senior internal leaders and customer technologists.

Requirements

Must-have skills and experience:

• Deep, hands-on experience in package substrate design automation: physical design, auto routing, DRC, PDN analysis, and design-for-manufacturing.
• Strong software development skills in C++, Python, and TCL with experience building production-quality EDA software.
• Proven experience leading R&D projects that delivered new architectural solutions (not just feature work).
• Extensive knowledge of computational geometry algorithms applied to physical design automation.
• Experience working directly with foundries and assembly/test (OSAT) partners to implement substrate technologies.
• Ability to communicate technical tradeoffs succinctly to executive and customer stakeholders and to mentor engineering teams.

Nice-to-have:

• Familiarity with design rule manuals, technology files, and ODB++ output formats for substrate manufacturing and validation.
• Experience with schematic-driven layout methodologies and data models connecting electrical and physical domains.

Education Requirements

Bachelor's or Master’s degree in Computer Science, Electrical Engineering, or a related field; or equivalent practical experience.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.