R&D Engineer, IC Design (Level 4)
Individual contributor responsible for front-end design and verification of ASIC cores. Work includes architecture definition, RTL/logic design, synthesis and constraint development, verification by simulation and formal methods, and timing analysis to achieve closure.
Collaborate with physical implementation, verification and system teams to deliver high-frequency ASIC blocks to tapeout.
Senior — employer guidance: typically a Bachelor's degree plus 8+ years of related experience, or a Master's degree plus 6+ years of related experience.
Key responsibilities include design, verification and delivery of front-end ASIC blocks.
Must-have technical skills and experience.
Bachelor's or Master’s degree in Electrical Engineering, Computer Engineering, or a closely related technical field. Employer guidance specifies: Bachelor's degree with ~8+ years related experience, or Master's degree with ~6+ years related experience; equivalent practical experience is acceptable.
Company: Broadcom
Headquarters: Irvine, California, United States
Broadcom is a global technology leader that designs, develops, and supplies a wide range of semiconductor and infrastructure software solutions. The company is known for its innovations in wireless and broadband communications, enabling a connected world.
