Job Title
Quantum Superconducting Interconnect Integration Engineer
Role Summary
Owner of development and integration for cryogenic superconducting interconnect and interposer technologies at GlobalFoundries Fab8. The role supports R&D and transition-to-manufacturing for scalable quantum system packaging and multi-die integration.
Experience Level
Senior β role expects extensive experience in superconducting interconnects and cryogenic packaging; source lists 10+ years of relevant experience for the required qualification.
Responsibilities
Deliver end-to-end integration of superconducting interconnect and interposer technologies and drive scalable quantum packaging solutions.
- Lead development of superconducting interconnect and interposer integration processes (e.g., Nb, Al, In, superconducting liners, redistribution layers).
- Design 2.5D / 3D cryogenic interposer architectures and optimize routing, metallization, and thermal management for low-loss RF and cryogenic reliability.
- Own wafer-level (RDL, TSV/TOV, via formation) and die-level (bump, bonding, assembly) integration flows and documentation.
- Translate system-level requirements into interconnect density, pitch, and routing specifications; enable early prototyping and transition to manufacturable flows.
- Identify failure modes, lead root-cause analysis, corrective actions, and reliability improvements for cryogenic interfaces.
- Collaborate with device, test, reliability, modeling teams, equipment suppliers, OSATs, and research partners to co-develop and qualify interconnect technologies.
- Contribute to advanced packaging roadmap and produce technical reports, process specs, and integration flow documentation.
Requirements
Core technical and practical requirements for successful performance in the role.
- Extensive hands-on experience with superconducting materials and metallization used in interconnects and interposers (Nb, Al, In) and related process integration.
- Experience with 2.5D/3D interposer architectures, redistribution layers, TSV/TOV, vias, bumping, bonding, and assembly interfaces.
- Knowledge of RF/microwave signal routing at cryogenic temperatures and thermal management to minimize leakage and preserve qubit performance.
- Track record of process integration planning, prototyping execution through fab and assembly, and transitioning flows toward manufacturability and yield improvement.
- Experience performing failure analysis, interface reliability assessment, and implementing corrective actions.
- Ability to work with equipment vendors and suppliers to set tool and process requirements for superconducting metallization and advanced 3D integration.
- Strong cross-functional collaboration skills with device, test, reliability, and external partners; effective written and verbal communication.
- Willingness to travel up to 20% and fluency in English (written and verbal).
Nice-to-have:
- Prior leadership or mentoring experience and project management capability.
- Experience with chiplet-style or multi-die system-level integration and roadmap planning.
Education Requirements
Master's degree in Electrical Engineering, Mechanical Engineering, Chemical Engineering, Materials Science, or a related field from an accredited program is required; the posting specifies an MS plus at least 10 years of related work experience and a minimum overall GPA of 3.0. PhD-level education is preferred (posting lists PhD preferred with at least 8 years of related experience).
About the Company
Company: GlobalFoundries
Headquarters: Saratoga Springs, New York, USA
GlobalFoundries is a leading contract manufacturer for the global semiconductor industry, with facilities in multiple countries, including the USA. The company develops a broad portfolio of semiconductor technologies and employs around 13,000 people worldwide. GlobalFoundries focuses on enhancing competitiveness in specialized application solutions and fostering innovation in mobile communications, consumer electronics, and automotive applications.

Date Posted: 2026-05-20