Product Validation Engineer

Role Summary

The Product Validation Engineer is responsible for developing and implementing emulation test plans to validate sophisticated semiconductor products. This role requires coordination with design, verification, and software teams to troubleshoot and ensure the reliability of products.

Experience Level

Mid-level; candidates should have 2-5 years of experience.

Responsibilities

The key responsibilities include:

• Developing and implementing emulation test plans for product validation.
• Using HDL languages (Verilog, VHDL) to design, implement, and debug emulation models.
• Collaborating with design, verification, and software teams to identify and resolve issues.

Requirements

The following are required:

• Bachelor’s or Master’s degree in Electrical/Electronics Engineering or a related field.
• Experience with HDL languages (Verilog, VHDL) and digital design.
• Strong background in emulation and validation of complex digital systems.
• Excellent problem-solving skills and attention to detail.

Education Requirements

Bachelor’s or Master’s degree in Electrical/Electronics Engineering or a related field.

About the Company

Company: Siemens

Headquarters: Munich, Germany

Siemens EDA is a leading global provider of Electronic Design Automation (EDA) products and systems. Their innovative solutions enable companies to enhance the development of electronic products efficiently and effectively, keeping pace with the complex demands of technology and physics. Siemens is committed to delivering advanced workflow solutions that integrate both EDA and MCAD tools for multi-domain design and manufacturing in the semiconductor industry.