Product Failure Analysis Engineer - SCAN Design for Test
Intel CorporationJob Title
Product Failure Analysis Engineer - SCAN Design for Test
Role Summary
Perform root-cause analysis and silicon debug for Intel Foundry products, focusing on scan-based design-for-test (DFT) and failure analysis to improve product quality, yield, and time-to-market.
Work on cross-functional teams supporting leading-edge process technology (Intel Foundry 18A), combining logical diagnosis and physical failure analysis to resolve complex silicon issues and develop automation and debug methodologies.
Experience Level
Mid-level / Experienced (typical candidate: 6+ years semiconductor experience; job listed as Experienced Hire).
Responsibilities
Primary responsibilities include silicon failure isolation, cross-functional debugging, and developing diagnostic tools and methodologies.
- Lead failure analysis using lab equipment (FIB, probe, SEM/TEM, automated systems) to isolate microscopic circuit failures and determine root cause.
- Perform logical diagnosis: ATPG, scan diagnosis, fault isolation and fault modeling to localize defects.
- Collaborate with DFT architects, design engineers, validation teams, process integration, yield, and manufacturing to drive corrective actions and mitigations.
- Design and implement debug automation, analysis frameworks, and methodologies to improve diagnosis accuracy and turnaround time.
- Evaluate and ensure design-for-debug features and scan architectures enable deep silicon isolation and post-silicon analysis.
- Provide recommendations for continuous improvement of failure analysis workflows and product quality.
Requirements
Must-have technical skills and hands-on experience; preferred items listed separately.
- Hands-on experience with DFT, SCAN ATPG methodology, and scan-chain diagnosis.
- Practical experience in fault isolation techniques, ATPG pattern generation, and fault modeling (stuck-at, transition, path delay, bridging).
- Experience with failure analysis equipment and physical debug methods (FIB, SEM, TEM, laser-based techniques, probe station workflows).
- Familiarity with tools such as Siemens Tessent, Synopsys TestMAX/TetraMAX, Verdi, DVE, and simulation/diagnosis tools.
- Experience developing debug automation and analysis tools using Python, Perl, or TCL.
- Proven ability to drive cross-functional investigations from problem identification through corrective action in a production or ramp environment.
- Nice-to-have: JTAG and validation/debug research methodologies; experience in foundry, fabless, or high-volume manufacturing supporting product bring-up and yield ramp.
Education Requirements
Bachelor's degree in electrical engineering, computer engineering, or a related STEM discipline with 6+ years of relevant hands-on experience; OR Master's degree with 4+ years; OR PhD with 2+ years. Equivalent practical experience may be accepted where stated. Fields referenced: electrical engineering, computer engineering, and related STEM disciplines.
About the Company
Company: Intel Corporation
Headquarters: Santa Clara, California, USA
Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.
