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Product Development Engineer

Altera
November 5, 2026
Full-time
On-site
San Jose, California, United States
$106,200 - $153,675 USD yearly
DFT Jobs, Level - Mid-Career

Job Title

Product Development Engineer

Role Summary

Join the Manufacturing Content Development Engineering Group to architect, develop, validate, and productize manufacturing test content for FPGAs. The role focuses on design-for-test (DFT), memory BIST flows, pre- and post-silicon test validation, and improving test coverage, yield, and test-time efficiency.

Experience Level

Mid-level - requires 3+ years of industry experience in IC design and test.

Responsibilities

Key responsibilities include developing DFT and manufacturing test content, validating test effectiveness, and supporting silicon debug and yield improvement.

  • Develop and implement DFT strategies (scan insertion, BIST, test compression).
  • Collaborate with RTL design and verification teams to integrate testability features.
  • Define and implement test plans, patterns, and fault models for coverage and yield.
  • Develop and maintain MBIST manufacturing test flows and scripts.
  • Perform pre-silicon test pattern simulation and validation prior to tape-out.
  • Analyze test results, debug silicon failures, and provide root-cause analysis.
  • Work with manufacturing and test teams to optimize test time, cost, and quality.
  • Analyze early customer returns and drive closure of test holes.
  • Drive test time reduction by balancing fallout data and test time across IPs.

Requirements

Must-have technical skills and tools for immediate contribution. Preferred items are listed separately.

Must-have
  • Experience in IC design and IC test (digital/analog fundamentals).
  • Practical experience with DFT methodologies: scan chains, Memory BIST, ATPG, boundary scan, test compression, IJTAG/JTAG.
  • Familiarity with test development tools (examples: Tessent IJTAG, Tessent MemoryBIST, FastScan, Tessent Shell).
  • Experience with RTL design, synthesis, and verification flows.
  • Experience in fault grading, test coverage analysis, test time analysis, and yield enhancement.
  • Scripting skills (Python, Perl, TCL, or similar) for test flow automation.
  • Knowledge of semiconductor manufacturing test processes.
Nice-to-have
  • Experience with Tessent MBIST flows, memory repair schemes, and memory algorithms.
  • Post-silicon experience: pattern conversion, ATE pattern bring-up, and silicon characterization.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering or a related engineering/technical field is requested; a Master's is listed as preferred. The posting also allows equivalent practical experience in place of the degree.


About the Company

Company: Altera

Headquarters: Bengaluru, Karnataka, India

Altera provides leadership programmable solutions for applications ranging from cloud to edge, unveiling limitless AI possibilities. Their extensive product portfolio includes FPGAs, CPLDs, Intellectual Property, development tools, and System on Modules aimed at accelerating innovation in various fields.

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Date Posted: 2026-11-03