Principal Verification Engineer

Job Title

Principal Verification Engineer

Role Summary

The FPGA Business Unit in Dublin seeks a Principal Verification Engineer to lead verification activities for next-generation secure, low-power FPGA SoC products. The role focuses on creating robust verification environments and methodologies to enable first-silicon success.

This position works closely with design, architecture, emulation, and prototyping teams and mentors junior engineers.

Experience Level

Senior level. The team requires at least 8+ years of experience in functional verification of complex SoC designs.

Responsibilities

Primary responsibilities include planning and executing verification tasks, improving verification methodology, and collaborating across hardware and software teams.

• Plan and perform functional verification of complex subsystems and SoCs using constrained-random, formal, and C-based methodologies.
• Design, develop, and maintain reusable UVM-based testbenches and verification environments.
• Execute RTL, power-aware, and gate-level verification flows.
• Integrate AI/ML-enabled verification techniques to improve quality and productivity.
• Collaborate with emulation and hardware-prototyping teams to define unified verification methodologies and acceleration strategies.
• Work with architecture and design teams to ensure verification targets align with first-silicon goals.
• Mentor and guide junior verification engineers.

Requirements

Must-have technical skills and experience for successful execution of the role.

• 8+ years in functional verification of complex SoC designs.
• Expertise in SystemVerilog, UVM, and formal verification methodologies.
• Experience in methodology development and verification flow automation.
• Familiarity with AI/ML-driven EDA tools and scripting for flow integration.
• Good understanding of SoC architectures (ARM and/or RISC-V).
• Hands-on experience with at least two of these domains: CPU subsystems, PCIe (Gen3/4/5), DDR4/DDR5/LPDDR4X, MIPI DSI/CSI, Ethernet MAC, USB, security/cryptography IPs.
• Exposure to emulation, hardware prototyping, FPGA-based acceleration platforms, and post-silicon debug.
• Proficient scripting and automation skills (Python, TCL/TK, C/C++).
• Familiarity with mainstream verification tool suites (Siemens/Cadence/Synopsys) and revision control (Git, Perforce, SVN).
• Strong debugging, communication, and cross-functional collaboration skills.

Nice-to-have:

• Deep understanding of FPGA architecture.
• Experience with coverage-driven verification using ML-based optimizations.
• Experience across complete SoC RTL-to-GDS-to-silicon release flows.

Education Requirements

BS or MS in Electrical/Electronic Engineering is specified in the source. Role expects significant practical experience (as listed) in lieu of higher academic requirements where applicable.

About the Company

Company: Microchip

Headquarters: Chandler, Arizona, USA

Microchip is a leading semiconductor company focused on developing innovative solutions to enhance the human experience. With a commitment to empowering innovation, Microchip prioritizes the value of its employees by fostering a culture that supports their growth and contributions.